ISSCC 2017

2017

208 篇论文 · Wireless (27) · Digital Processors (24) · Wireline I/O (24) · Memory (17) · Power Management (15)

ISSCC 2017 Session 16 Data Converters
An 8GS/s Time-Interleaved SAR ADC with Unresolved Decision Detection Achieving -58dBFS Noise and 4GHz Bandwidth in 28nm CMOS
John P. Keane1, Nathaniel J. Guilar1, Dusan Stepanovic1,2,
Bernd Wuppermann1, Charles Wu1, Cheongyuen W. Tsang1,3, Robert Neff1, Ken Nishimura1 Keysight Technologies, Santa Clara, CA 1 now with Apple, Cupertino, CA 3 now with Adecco, Mountain View, CA compared using an XNOR gate
ISSCC 2017 Session 16 Data Converters
A 10b DC-to-20GHz Multiple-Return-to-Zero DAC with >48dB SFDR
Lucas Duncan1, Brian Dupaix1, Jamin McCue1, Brandon Mathieu1,
towards mm-wave frequencies has increased the demand for UWB DACs with minimal spurious emissions. At mm-wave, intra-DAC dynamic timing and data errors consume a significant portion of the clock period, degrading SFDR. P
ISSCC 2017 Session 16 Data Converters
A 12b 10GS/s Interleaved Pipeline ADC in 28nm CMOS Technology
Siddharth Devarajan1, Larry Singer1, Dan Kelly1, Steve Kosic2, Tao Pan1,
Jose Silva1, Janet Brunsilius2, Daniel Rey-Losada2, Frank Murden3, Carroll Speir3, Jeff Bray2, Eric Otte1, Nevena Rakuljic2, Phil Brown3, Todd Weigandt2, Qicheng Yu1, Donald Paterson1, Corey Petersen2, Jeffrey Gealow1 An
ISSCC 2017 Session 17 Wireline I/O
A Digitally Assisted CMOS WiFi 802.11ac/11ax FrontEnd Module Achieving 12% PA Efficiency at 20dBm Output Power with 160MHz 256-QAM OFDM Signal
Yuen Hui Chee1, Fatih Golcuk1, Toru Matsuura1, Christopher Beale2,
James F. Wang1, Osama Shanaa1 MediaTek, San Jose, CA, 2MediaTek, Kent, United Kingdom 1 Front-end modules (FEM) typically employ expensive III-V or SiGe technologies to provide relatively higher PA output power and lower
ISSCC 2017 Session 17 Wireline I/O
A 318-to-370GHz Standing-Wave 2D Phased Array in 0.13μm BiCMOS
Hossein Jalili, Omeed Momeni
Fully integrated implementation of mm-wave/THz radiators and phased arrays presents new potentials for applications like spectroscopy, imaging, and high data-rate communication. These applications demand sufficient radia
ISSCC 2017 Session 17 Wireline I/O
A 28GHz Magnetic-Free Non-Reciprocal Passive CMOS Circulator Based on Spatio-Temporal Conductance Modulation
Tolga Dinc, Harish Krishnaswamy
A significant challenge for silicon-based mm-wave systems is a low-loss sharedantenna (ANT) interface with high linearity, isolation (ISO) and bandwidth (BW). Shared ANT interfaces with simultaneous transmit and receive
ISSCC 2017 Session 17 Wireline I/O
A 60GHz On-Chip Linear Radiator with Single-Element 27.9dBm Psat and 33.1dBm Peak EIRP Using Multifeed Antenna for Direct On-Antenna Power Combining
Taiyun Chi, Fei Wang, Sensen Li, Min-Yu Huang, Jong Seok Park, Hua Wang
links, e.g., for the 5G communication, is to provide large transmitter (Tx) output power (Pout) with high energy efficiency and linearity from a limited supply voltage, so that the high path loss and limited link budget
ISSCC 2017 Session 17 Wireline I/O
A Sub-mW Antenna-Impedance Detection Using Electrical Balance for Single-Step On-Chip Tunable Matching in Wearable/Implantable Applications
Chuang Lu, Ao Ba, Yao-Hong Liu, Xiaoyan Wang, Christian Bachmann, Kathleen Philips
g., heart-rate-monitor straps and implanted wireless sensors, need to be ultra-low-power (ULP), compact, and also robust against the proximity effect, which can significantly degrade the antenna and frontend performance
ISSCC 2017 Session 17 Wireline I/O
An Intrinsically Linear Wideband Digital Polar PA Featuring AM-AM and AM-PM Corrections Through
Nonlinear Sizing, Overdrive-Voltage Control, and, Multiphase RF Clocking
Mohsen Hashemi1, Yiyu Shen1, Mohammadreza Mehrpoo1, Mustafa Acar2, René van Leuken1, Morteza S. Alavi1, Leonardus de Vreede1 Delft University of Technology, Delft, The Netherlands Ampleon, Nijmegen, The Netherlands 1 2 T
ISSCC 2017 Session 17 Wireline I/O
Rapid and Energy-Efficient Molecular Sensing Using Dual mm-Wave Combs in 65nm CMOS: A 220-to-320GHz Spectrometer with 5.2mW Radiated Power and 14.6-to-19.5dB Noise Figure
Cheng Wang, Ruonan Han
Millimeter-wave/terahertz rotational spectroscopy offers ultra-wide-detection range of gas molecules for chemical and biomedical sensing. Therefore, wideband, energy-efficient, and fast-scanning CMOS spectrometers are in
ISSCC 2017 Session 17 Wireline I/O
A Packaged 90-to-300GHz Transmitter and 115-to325GHz Coherent Receiver in CMOS for Full-Band Continuous-Wave mm-Wave Hyperspectral Imaging
Taiyun Chi, Min-Yu Huang, Sensen Li, Hua Wang
Millimeter-wave/THz hyperspectral imaging has numerous applications in security, non-destructive evaluation, material characterization, and medical diagnostics [1]. Unlike single-frequency imaging, hyperspectral imaging
ISSCC 2017 Session 17 Wireline I/O
A Compact 130GHz Fully Packaged Point-to-Point Wireless System with 3D-Printed 26dBi Lens Antenna Achieving 12.5Gb/s at 1.55pJ/b/m detection using mixers, which are power hungry. With the choice of an optimum current density for maximum gain (enhanced nonlinearity regime), and device size to fulfill the NF requirement based on input power, the ED consumes only 750μW, with NF<15dB at input sensitivity levels.
Nemat Dolatsha1, Baptiste Grave1,2, Mahmoud Sawaby1, Cheng Chen1,
Afshin Babveyh1, Siavash Kananian1, Aimeric Bisognin3,4, Cyril Luxey3, Frederic Gianesello4, Jorge Costa5,6, Carlos Fernandes7, Amin Arbabian1 To address the stringent link requirements, and also to utilize spatial degre
ISSCC 2017 Session 17 Wireline I/O
A 105Gb/s 300GHz CMOS Transmitter
Kyoya Takano1, Shuhei Amakawa1, Kosuke Katayama1, Shinsuke Hara2,
Ruibing Dong2, Akifumi Kasamatsu2, Iwao Hosako2, Koichi Mizuno3, Kazuaki Takahashi3, Takeshi Yoshida1, Minoru Fujishima1 Hiroshima University, Higashihiroshima, Japan National Institute of Information and Communications
ISSCC 2017 Session 18 Wireless
A 1.7-to-2.2GHz Full-Duplex Transceiver System with >50dB Self-Interference Cancellation over 42MHz Bandwidth
Tong Zhang, Ali Najafi, Chenxin Su, Jacques C. Rudell
Full-duplex (FD) radio communication potentially doubles the spectral efficiency in the densely occupied RF spectrum (100MHz to 5GHz). However, significant challenges remain, particularly the presence of a strong transmi
ISSCC 2017 Session 18 Wireless
Highly-Linear Integrated Magnetic-Free CirculatorReceiver for Full-Duplex Wireless
Negar Reiskarimian, Mahmood Baraani Dastjerdi, Jin Zhou, Harish Krishnaswamy
implementation of low-cost, small-form-factor, integrated shared-antenna (ANT) interfaces with low loss, low noise, high TX-RX isolation, and large TX power handling. Providing more TX-RX isolation in the ANT interface t
ISSCC 2017 Session 18 Wireless
A Single-Port Duplex RF Front-End for X-Band SingleAntenna FMCW Radar in 65nm CMOS
Yu-Hsien Kao1, Hao-Chung Chou1, Chun-Chieh Peng1, Yu-Jiu Wang2,
Frequency-modulated continuous-wave (FMCW) radars can provide high resolution and superior sensitivity for wireless sensing [1-3]. Radar signals, whose frequency increases or decreases linearly with time, are transmitted
ISSCC 2017 Session 19 Clocking & PLLs
A Fundamental-Frequency 114GHz Circular-Polarized
Radiating Element with 14dBm EIRP, -99.3dBc/Hz, Phase-Noise at 1MHz Offset and 3.7% Peak Efficiency
viable choice for imaging/sensing applications by offering faster scan time and robust source-detector alignment compared to linear radiation [1]. Power-efficient generation of a low-noise, highpower mm-wave/THz circular
ISSCC 2017 Session 19 Clocking & PLLs
A PVT-Robust -39dBc 1kHz-to-100MHz IntegratedPhase-Noise 29GHz Injection-Locked Frequency Multiplier with a 600μW Frequency-Tracking Loop Using the Averages of Phase Deviations for mm-Band 5G Transceivers
Seyeon Yoo, Seojin Choi, Juyeop Kim, Heein Yoon, Yongsun Lee, Jaehyouk Choi
have an ultra-wide bandwidth in a mm-wave band. A big challenge of a 5G transceiver is to generate ultra-low-PN (phase noise) local-oscillator (LO) signals to suppress integrated PN (IPN) over such an extremely wide band
ISSCC 2017 Session 19 Clocking & PLLs
A 50-to-66GHz 65nm CMOS All-Digital Fractional-N PLL with 220fsrms Jitter
Ahmed Hussein, Sriharsha Vasadi, Mazen Soliman, Jeyanandh Paramesh
Digital-PLL frequency synthesizers for wireless applications have become popular in the sub-10GHz range. However, mm-wave synthesizers still rely on analog PLLs, predominantly of the integer-N type [1]. This is due to li
ISSCC 2017 Session 19 Clocking & PLLs
A 0.0049mm2 2.3GHz Sub-Sampling Ring-Oscillator PLL with Time-Based Loop Filter Achieving -236.2dB Jitter-FOM
Jeffrey (Tsung-Hao) Chuang, Harish Krishnaswamy
High-performance phase-locked loops (PLLs) and clock multipliers with low jitter/phase noise are essential for numerous applications, such as digital microprocessors and SoCs, wireline/optical links, data converters and
ISSCC 2017 Session 19 Clocking & PLLs
A 2.4GHz RF Fractional-N Synthesizer with 0.25fREF BW
Long Kong, Behzad Razavi
The loop bandwidth of conventional RF fractional-N synthesizers has been limited to about fREF/10 despite the use of methods that suppress the ΔΣ-modulator quantization noise [1-4]. The trade-off between the loop bandwid
ISSCC 2017 Session 19 Clocking & PLLs
A 0.2V Trifilar-Coil DCO with DC-DC Converter in
16nm FinFET CMOS with 188dB FOM, 1.3kHz
Resolution, and Frequency Pushing of 38MHz/V for Energy Harvesting Applications QTrifialr=Im(ZTotal)/Re(ZTotal). The total QTrifilar is a combination of Q-factors of the three coils. Two thick metals and one ultra-thick
ISSCC 2017 Session 2 Power Management
A 28GHz/37GHz/39GHz Multiband Linear Doherty Power Amplifier for 5G Massive MIMO Applications
Song Hu, Fei Wang, Hua Wang
Millimeter-wave fifth-generation (5G) systems will extensively leverage massive multiple-input multiple-output (MIMO) architectures to improve their link performance. These array systems will employ many power amplifiers
ISSCC 2017 Session 2 Power Management
A Fully Integrated Reconfigurable Wideband Envelope-Tracking SoC for High-Bandwidth WLAN Applications in a 28nm CMOS Technology
Debopriyo Chowdhury, Sraavan R. Mundlapudi, Ali Afsahi
Envelope tracking (ET) has become popular for enhancing battery life in mobile communication devices that employ high peak-to-average power ratio (PAPR) signals. Most of the published ET systems have focused either on na
ISSCC 2017 Session 2 Power Management
A Single-Inductor Dual-Output Converter with LinearAmplifier-Driven Cross Regulation for Prioritized Energy-Distribution Control of Envelope-Tracking Supply Modulator
Shang-Hsien Yang1, Yen-Ting Lin1, Yu-Sheng Ma1, Hung-Wei Chen1,
mobile devices handle modulated signals with high peak-toaverage power ratios (PAPRs) while maintaining linearity and power efficiency. Envelope-tracking technology increases the efficiency of an RF-PA by modulating its
ISSCC 2017 Session 2 Power Management
A 2.4V 23.9dBm 35.7%-PAE -32.1dBc-ACLR LTE20MHz Envelope-Shaping-and-Tracking System with a Multiloop-Controlled AC-Coupling Supply Modulator and a Mode-Switching PA
Xun Liu, Heng Zhang, Min Zhao, Xuan Chen, Philip K. T. Mok, Howard C. Luong
the efficiency of the power amplifiers (PAs) due to high peak-to-average power ratios of transmitted signals. Envelope tracking (ET) and envelope-eliminationand-restoration (EER) techniques have been proposed to improve
ISSCC 2017 Session 2 Power Management
A High-Efficiency Multiband Class-F Power Amplifier in 0.153μm Bulk CMOS for WCDMA/LTE Applications
Jenwei Ko, Xiaochuan Guo, Changhua Cao, Saravanan Rajapandian,
Solti Peng, Jing Li, Wenchang Lee, Narayanan Baskaran, Caiyi Wang Although the Class-F operation and the HVMOS improve reliability significantly, real-time voltage-stress monitoring (VSM) is implemented on each of the ou
ISSCC 2017 Session 2 Power Management
A SiGe BiCMOS E-Band Power Amplifier with 22% PAE at 18dBm OP1dB and 8.5% at 6dB Back-Off Leveraging Current Clamping in a Common-Base Stage
Junlei Zhao1,2, Elham Rahimi1, Francesco Svelto1, Andrea Mazzanti1
now with HiSilicon-Technologies, Milan, Italy 2 Several spectrum portions at mm-waves are considered for Gb/s data-rates in 5G cellular wireless backhaul and access networks, further motivating innovation in circuits and
ISSCC 2017 Session 2 Power Management
A Wideband 28GHz Power Amplifier Supporting 8×100MHz Carrier Aggregation for 5G in 40nm CMOS
Sherif Shakib1, Mohamed Elkholy1, Jeremy Dunworth2, Vladimir Aparin2, Kamran Entesari1
racing to deploy fifth generation (5G) mm-wave technology, e.g., rollout of some 28GHz-band services is intended in 2017 in the USA with ~5/1Gb/s downlink/uplink targets. Even with 64-QAM signaling, this translates to an
ISSCC 2017 Session 2 Power Management
A Class-G Voltage-Mode Doherty Power Amplifier
Voravit Vorapipat, Cooper Levy, Peter Asbeck
In modern communication, wideband and high-spectral-efficiency modulation results in high peak-to-average power ratio (PAPR), up to 8 to 10dB. Well-known PA-efficiency-enhancement techniques, such as Doherty and outphasi
ISSCC 2017 Session 20 Digital Circuits
A Digitally Controlled Fully Integrated Voltage Regulator with On-Die Solenoid Inductor with Planar Magnetic Core in 14nm Tri-Gate CMOS
Harish Kumar Krishnamurthy, Vaibhav Vaidya, Sheldon Weng,
efficient and widerange local power delivery and management capability with fast transient response for fine-grain DVFS domains of high power density in complex SoCs. Integration of high-quality power inductors that can
ISSCC 2017 Session 20 Digital Circuits
Digital Low-Dropout Regulator with Anti PVT-Variation Technique for Dynamic Voltage Scaling and Adaptive Voltage Scaling Multicore Processor
Wen-Jie Tsou1, Wen-Hau Yang1, Jian-He Lin1, Hsin Chen1,
processors have been widely used in battery-operated portable systems, desktop, and server applications, where dynamic voltage scaling (DVS) and adaptive voltage scaling (AVS) techniques are commonly employed to lower po
ISSCC 2017 Session 20 Digital Circuits
A 100nA-to-2mA Successive-Approximation Digital LDO with PD Compensation and Sub-LSB Duty Control Achieving a 15.1ns Response Time at 0.5V
Loai G. Salem, Julian Warchall, Patrick P. Mercier
Modern subthreshold SoC designs feature multiple power domains to dynamically track the maximum energy-efficiency point (0.32-0.45V [1]) in response to application demands. While analog low-drop-out (LDO) regulators have
ISSCC 2017 Session 20 Digital Circuits
An Output-Capacitor-Free Analog-Assisted Digital Low-Dropout Regulator with Tri-Loop Control
Mo Huang1,2, Yan Lu1, Seng-Pan U1,3, Rui P. Martins1,4
now with South China University of Technology, Guangzhou, China 2 Synopsys Macau Ltd, Macao, China Instituto Superior Tecnico, Universidade de Lisboa, Portugal 3 4 Low-dropout regulators (LDOs) are widely distributed in
ISSCC 2017 Session 20 Digital Circuits
A Dual-Symmetrical-Output Switched-Capacitor Converter with Dynamic Power Cells and Minimized Cross Regulation for Application Processors in 28nm CMOS of the regulation loop is much faster than that of power-cell allocation, stability is ensured. Each power cell consists of 2 flying capacitors and 8 power transistors and the VCR can be 2/3× or 1/2×. The configuration of each power cell is optimized to minimize the parasitic loss [6]. The channel selection switches, controlled by sel[n], connect the local output VOL to VO1 or VO2.
Junmin Jiang1,2, Yan Lu1, Wing-Hung Ki2, Seng-Pan U1,3, Rui P. Martins1,4, Figure 20.5.3 shows the control logic that co
and the power-cell shift register. First, the one-shot signals (ck1os and ck2os) control P1 and P2 to charge CC1 and CC2 for one clock period only. The ready signals (ready1 and ready2) are activated after charging is fi
ISSCC 2017 Session 20 Digital Circuits
A 0.5V-VIN 1.44mA-Class Event-Driven Digital LDO with a Fully Integrated 100pF Output Capacitor
Doyun Kim1, Jonghwan Kim2, Hyunju Ham2, Mingoo Seok1
SK hynix, Icheon, Korea 1 2 In today’s system-on-chip designs, a low-drop-out voltage regulator (LDO) is one of the most popular choices to create a distinct voltage domain owing to its high power density. Many LDOs, how
ISSCC 2017 Session 20 Digital Circuits
A 13.8µW Binaural Dual-Microphone Digital ANSI S1.11 Filter Bank for Hearing Aids with Zero-ShortCircuit-Current Logic in 65nm CMOS
Hsi-Shou Wu, Zhengya Zhang, Marios C. Papaefthymiou
This paper presents an ANSI S1.11 1/3-octave filter-bank chip for binaural hearing aids with two microphones per ear. Binaural multimicrophone systems significantly suppress noise interference and preserve interaural tim
ISSCC 2017 Session 21 Digital Processors
Nanowatt Circuit Interface to Whole-Cell Bacterial Sensors
Phillip Nadeau1, Mark Mimee1, Sean Carim2, Timothy K. Lu1, Anantha P. Chandrakasan1
emerging as a platform for small molecule detection in challenging environments [1]. A key barrier to widespread deployment of autonomous bacterial sensors is the detection of low-level bioluminescence, which is typicall
ISSCC 2017 Session 21 Digital Processors
A 1.4mΩ-Sensitivity 94dB-Dynamic-Range Electrical Impedance Tomography SoC and 48-Channel Hub SoC for 3D Lung Ventilation Monitoring System
Minseo Kim, Hyunki Kim, Jaeeun Jang, Jihee Lee, Jaehyuk Lee,
ventilation because it is the only real-time lung imaging method without large equipment [1-2]. However, previous EIT systems just provided 2D cross-sectional image with limited spatial information of the lung and unnegl
ISSCC 2017 Session 21 Digital Processors
A Sub-mm3 Wireless Implantable Intraocular Pressure Monitor Microsystem
Hansraj Bhamra, Jui-Wei Tsai, Yu-Wen Huang, Quan Yuan, Pedro Irazoqui
intraocular pressure (IOP) in the anterior chamber of the eye can damage the optic nerve causing irreversible blindness [1]. An IOP monitoring microsystem (IMM) implanted in the interior chamber of the eye is required to
ISSCC 2017 Session 21 Digital Processors
A Reduced-Order Sliding-Mode Controller with an Auxiliary PLL Frequency Discriminator for Ultrasonic Electric Scalpels
Xiaosen Liu1,2, Adrian I. Colli-Menchi1, Edgar Sanchez-Sinencio1
Intel, Hillsboro, OR 1 2 Piezoelectric transducer (PT) is an emerging energy-based technology for electrosurgery. With proper driving signals, the PT is utilized as an electric scalpel as shown in Fig. 21.4.1. It convert
ISSCC 2017 Session 21 Digital Processors
A 3-to-5V Input 100Vpp Output 57.7mW 0.42% THD+N Highly Integrated Piezoelectric Actuator Driver
Simon Chaput, David Brooks, Gu-Yeon Wei
Piezoelectric actuators are used in a growing range of applications, e.g., haptic feedback systems, cooling fans, and microrobots. However, to fully realize their potential, these actuators require drivers able to effici
ISSCC 2017 Session 21 Digital Processors
A 12nW Always-On Acoustic Sensing and Object Recognition Microsystem Using Frequency-Domain Feature Extraction and SVM Classification
Seokhyeon Jeong1, Yu Chen1,2, Taekwang Jang1, Julius Tsai3,
increasingly intelligent and context-aware. Sound is an attractive sensory modality because it is information-rich but not as computationally demanding as alternatives such as vision. New applications of ultra-low power
ISSCC 2017 Session 21 Digital Processors
2pJ/MAC 14b 8×8 Linear Transform Mixed-Signal Spatial Filter in 65nm CMOS with 84dB Interference Suppression
Siddharth Joshi1, Chul Kim1, Sohmyung Ha2, Yu Mike Chi3, Gert Cauwenberghs1
machine learning (ML) and the internet-of-things (IoT) have resulted in a renewed interest in analog matrix-vector multiplication (MvM) accelerators [1-3]. Classification based tasks have exploited low-to-medium resoluti
ISSCC 2017 Session 21 Digital Processors
An Actively Detuned Wireless Power Receiver with Public Key Cryptographic Authentication and Dynamic Power Allocation
Nachiket V. Desai1, Chiraag Juvekar1, Shubham Chandak2, Anantha P. Chandrakasan1
they replace Point-Doubling with an essentially free Frobenius Endomorphism [7]. Efficient micro-coding and a Serial Input Parallel Output (SIPO) finite field multiplier ensure that only 2 additional registers (t, z) are
ISSCC 2017 Session 22 Wireless
A Self-Tuning Resonant Inductive Link Transmit Driver Using Quadrature-Symmetric Phase-Switched Fractional Capacitance
Henry Kennedy, Rares Bodnar, Teerasak Lee, William Redman-White
University of Southampton, Southampton, United Kingdom Inductive coupling for power transfer is increasingly popular in many applications such as RFID and wireless charging. While much recent work has focussed on receive
ISSCC 2017 Session 22 Wireless
A 1.7mm2 Inductorless Fully Integrated FlippingCapacitor Rectifier (FCR) for Piezoelectric Energy Harvesting with 483% Power-Extraction Enhancement
Zhiyuan Chen1, Man-Kay Law1, Pui-In Mak1, Wing-Hung Ki2,
Rui P. Martins1,3 University of Macau, Macau, China Hong Kong University of Science and Technology, Hong Kong, China 3 Instituto Superior Tecnico, Universidade de Lisboa, Portugal 1 2 Energy Harvesting is crucial to the
ISSCC 2017 Session 22 Wireless
Adaptive Reconfigurable Voltage/Current-Mode Power Management with Self-Regulation for ExtendedRange Inductive Power Transmission
Hesam Sadeghi Gougheri, Mehdi Kiani
Wireless power transmission (WPT) via inductive coupling is used in many applications such as biomedical implants, sensors, and radio-frequency identification (RFID). Range extension, robustness against load (RL) variati
ISSCC 2017 Session 22 Wireless
A Reconfigurable Bidirectional Wireless Power Transceiver with Maximum-Current Charging Mode and 58.6% Battery-to-Battery Efficiency
Mo Huang1,a, Yan Lu1, Seng-Pan U1,2, Rui P. Martins1,3
Synopsys Macau, Macau, China 3 Instituto Superior Tecnico, Universidade de Lisboa, Portugal 1 2 a And the MUX7 needs to conduct the same current as MP and MN, which will double the area and conduction loss. 2) Under the
ISSCC 2017 Session 22 Wireless
A 93%-Power-Efficiency Photovoltaic Energy Harvester with Irradiance-Aware Auto-Reconfigurable MPPT Scheme Achieving >95% MPPT Efficiency Across 650μW to 1W and 2.9ms FOCV MPPT Transient Time
Sandip Uprety, Hoi Lee
With more and more functions in modern battery-powered mobile devices, enabling light-harvesting in the power management system can extend battery usage time [1]. For both indoor and outdoor operations of mobile devices,