ISSCC 2018
Session 17
Digital Processors
A 0.28mΩ-Sensitivity 105dB-Dynamic-Range Electrochemical Impedance Spectroscopy SoC for Electrochemical Gas Detection
Colin Lyden3, Yincai Liu1, Junbiao Ding4, Dennis Dempsey2, Leicheng Chen1, Donal Bourke3, Shurong Gu1, Jun Gao1, Lizhu Lu1, Li Wang1, Xuemin Li1, Hongxing Li5, Chao Chu1, Ling Yang1 Analog Devices, Beijing, China; 2Analo
ISSCC 2018
Session 17
Digital Processors
50nW 5kHz-BW Opamp-Less ΔΣ Impedance Analyzer for Brain Neurochemistry Monitoring
Suzie Dufou1,2, Peter L. Carlen1,2, Michael Thompson1, Roman Genov1 University of Toronto, Toronto, Canada Toronto Western Hospital, Toronto, Canada 1 2 Potassium (K+) and sodium (Na+) ions are the main signal carriers i
ISSCC 2018
Session 17
Digital Processors
A 200Mb/s Inductively Coupled Wireless Transcranial Transceiver Achieving 5e-11 BER and 1.5pJ/b Transmit Energy Efficiency
Inphi, Santa Clara, CA 1 2 Recent advancements in medical neural science and brain research have enabled the potential of uninterrupted simultaneous recording of thousands of neurons. To minimize the risk of infection to
ISSCC 2018
Session 17
Digital Processors
A 330μm×90μm Opto-Electronically Integrated Wireless System-on-Chip for Recording of Neural Activities
Paul L. McEuen, Alyosha C. Molnar Cornell University, Ithaca, NY Recording neural activity in live animals in vivo poses several challenges. Electrical techniques typically require electrodes to be tethered to the outsid
ISSCC 2018
Session 17
Digital Processors
A 665μW Silicon Photomultiplier-Based NIRS/EEG/EIT Monitoring ASIC for Wearable Functional Brain Imaging
Hyunsoo Ha1, Roland van Wegberg1, Erfan Sheikhi1, Massimo Mazzillo3, Giorgio Fallica3, Walter De Raedt2, Chris Van Hoof2,4, Nick Van Helleputte2 imec - Holst Centre, Eindhoven, The Netherlands; 2imec, Leuven, Belgium 3 S
ISSCC 2018
Session 17
Digital Processors
A Recursive-Memory Brain-State Classifier with 32-Channel Track-and-Zoom Δ2Σ ADCs and Charge-Balanced Programmable Waveform Neurostimulators
David Groppe2, Taufik A. Valiante3, Naveen Verma4, Roman Genov1 University of Toronto, Toronto, Canada Krembil Neuroscience Center, Toronto, Canada 3 Toronto Western Hospital, Toronto, Canada 4 Princeton University, Prin
ISSCC 2018
Session 18
Digital Circuits
Droop Mitigation Using Critical-Path Sensors and an On-Chip Distributed Power Supply Estimation Engine in the z14TM Enterprise Processor
Preetham Lobo3, Richard Rizzolo4, Tobias Webel2, Pawel Owczarczyk4, Alper Buyuktosunoglu1, Ramon Bertran1, David Hui4, Susan M. Eickhoff4, Michael Floyd5, Gerard Salem6, Sean Carey4, Stelios G. Tsapepas4, Phillip J. Rest
ISSCC 2018
Session 18
Digital Circuits
A Combined All-Digital PLL-Buck Slack Regulation System with Autonomous CCM/DCM Transition Control and 82% Average Voltage-Margin Reduction in a 0.6-to-1.0V Cortex-M0 Processor
Naveen John, Visvesh S. Sathe University of Washington, Seattle, WA Integrated Voltage Regulation (IVR) using buck converters enables efficient, finegrained supply-voltage control in modern SoC domains [1]. However, exis
ISSCC 2018
Session 18
Digital Circuits
A 2.5µW 0.0067mm2 Automatic Back-Biasing Compensation Unit Achieving 50% Leakage Reduction in FDSOI 28nm over 0.35-to-1V VDD Range
STMicroelectronics, Crolles, France 1 2 Worst-case design and post-silicon tuning are well established digital design practices reducing timing violations in presence of process, temperature, aging and voltage variations
ISSCC 2018
Session 18
Digital Circuits
A 0.4V 430nA Quiescent Current NMOS Digital LDO with NAND-Based Analog-Assisted Loop in 28nm CMOS
University of Electronic Science and Technology of China, Chengdu, China 3 Instituto Superior Tecnico/University of Lisboa, Lisbon, Portugal the number of registers. The fine loop contains an 8b SR, controlling eight 1×s
ISSCC 2018
Session 18
Digital Circuits
A Fully Integrated 40pF Output Capacitor BeatFrequency-Quantizer-Based Digital LDO with Built-In Adaptive Sampling and Active Voltage Positioning
University of Minnesota, Minneapolis, MN Cisco Systems, San Jose, CA 1 2 Integrated voltage regulators with a wide output current/voltage dynamic range are required to support fast dynamic voltage and frequency scaling (
ISSCC 2018
Session 18
Digital Circuits
A 500mA Analog-Assisted Digital-LDO-Based On-Chip Distributed Power Delivery Grid with Cooperative Regulation and IR-Drop Reduction in 65nm CMOS
Qualcomm, Singapore 1 2 With the die area of modern processors growing larger and larger, the IR drop across the power supply rail due to its parasitic resistance becomes considerable. There is an urgent demand for local
ISSCC 2018
Session 18
Digital Circuits
A Sub-1.55mV-Accuracy 36.9ps-FOM Digital-LowDropout Regulator Employing Switched-Capacitor Resistance
Modern DVFS-enabled SoCs require nimble supply regulators that rapidly respond to abrupt load changes and offer fine resolution (e.g., 12.5mV in [1], 10mV in
ISSCC 2018
Session 18
Digital Circuits
A High-Efficiency and Fast-Transient Digital-LowDropout Regulator with the Burst Mode Corresponding to the Power-Saving Modes of DC-DC Switching Converters
switching-frequency select signal FSEL[1:0]. Initially, the NLSC speeds up the switching frequency, where QBST[6:0] decreases by 1 every 2/3×T1 (=TR/(QN(MAX)-QN(MIN)) time periods. At the end, it slows down the clock fre
ISSCC 2018
Session 19
RF & Wireless
An 8b Subthreshold Hybrid Thermal Sensor with ±1.07°C Inaccuracy and Single-Element Remote-Sensing Technique in 22nm FinFET
(SoC) to provide information about die temperature for thermal protection or performance optimization. To enable the deployment of multiple sensors in an SoC, the power and size of such sensors has been steadily reduced.
ISSCC 2018
Session 19
RF & Wireless
A 0.25mm2 Resistor-Based Temperature Sensor with an Inaccuracy of 0.12°C (3σ) from -55°C to 125°C and a Resolution FOM of 32fJ∙K2
Temperature sensors based on Wheatstone bridges, e.g. [1,2], have recently achieved higher resolution and greater energy efficiency than conventional BJTbased sensors [3]. However, this comes at the expense of area, maki
ISSCC 2018
Session 19
RF & Wireless
A 0.53pJ∙K2 7000μm2 Resistor-Based Temperature Sensor with an Inaccuracy of ±0.35°C (3σ) in 65nm CMOS
Jieun Jang2, Junhyun Chun2, Kofi A. A. Makinwa3, Youngcheol Chae1 Yonsei University, Seoul, Korea; 2SK hynix, Icheon, Korea Delft University of Technology, Delft, The Netherlands 1 3 In microprocessors and DRAMs, on-chip
ISSCC 2018
Session 19
RF & Wireless
A ±4A High-Side Current Sensor with 25V Input CM Range and 0.9% Gain Error from -40°C to 85°C Using an Analog Temperature Compensation Technique
This paper presents a fully integrated ±4A current sensor that supports a 25V input common-mode voltage range (CMVR) while operating from a single 1.5V supply. It consists of an on-chip metal shunt, a beyond-the-rails AD
ISSCC 2018
Session 19
RF & Wireless
A Current-Measurement Front-End with 160dB Dynamic Range and 7ppm INL
Accurate current measurement is crucial in many biosensing applications, such as the detection of neurotransmitters [1] and the monitoring of intercellular molecular dynamics. This need has become even more critical rece
ISSCC 2018
Session 19
RF & Wireless
A 2.5nJ Duty-Cycled Bridge-to-Digital Converter Integrated in a 13mm3 Pressure-Sensing System
piezoresistive MEMS sensors, often configured in a Wheatstone bridge, are widely used to measure physical signals such as pressure [1-3], temperature [4], force [1], and gas concentration. A common method to realize a di
ISSCC 2018
Session 19
RF & Wireless
A 21.8b Sub-100μHz 1/f Corner 2.4μV-Offset Programmable-Gain Read-Out IC for Bridge Measurement Systems
High-resolution read-out integrated circuits (ROICs) are often used in DC measurement systems such as bridge transducers. Since these typically output small-amplitude signals with a bandwidth of a few hertz, a highly lin
ISSCC 2018
Session 19
RF & Wireless
A Phase-Domain Readout Circuit for a CMOSCompatible Thermal-Conductivity-Based Carbon Dioxide Sensor
Kofi A. A. Makinwa1, Michiel Pertijs1 Delft University of Technology, Delft, The Netherlands NXP Semiconductors, Eindhoven, The Netherlands 3 ams AG, Eindhoven, The Netherlands 1 2 The measurement of carbon-dioxide (CO2)
ISSCC 2018
Session 2
Digital Processors
SkyLake-SP: A 14nm 28-Core Xeon® Processor
Kalapi Royneogi, Nagmohan Satti, Rizwan Qureshi, Wei Chen, Tom Wang, Hubert Hsieh, Sujal Vora, Eddie Wang Intel, Santa Clara, CA SkyLake-SP (Scalable Performance), code name SKX, is the next generation Xeon® server proce
ISSCC 2018
Session 2
Digital Processors
IBM z14TM: 14nm Microprocessor for the Next-Generation Mainframe
Brian Bell4, Frank Malgioglio1, Guenter Mayer5, Dina Hamid1, Jesse Surprise1, David Wolpert1, Ofer Geva6, Bill Huott1, Leon Sigal2, Sean Carey1, Richard Rizzolo1, Ricardo Nigaglioni3, Mark Cichanowski3, Dureseti Chidamba
ISSCC 2018
Session 2
Digital Processors
An Energy-Efficient Graphics Processor Featuring
Execution-Unit Turbo, and Retentive Sleep in 14nm Tri-Gate CMOS Pascal Meinerzhagen1, Carlos Tokunaga1, Andres Malavasi1, Vaibhav Vaidya1, Ashwin Mendon1, Deepak Mathaikutty1, Jaydeep Kulkarni1, Charles Augustine1, Minki
ISSCC 2018
Session 2
Digital Processors
"Zeppelin": An SoC for Multichip Architectures
AMD, Fort Collins, CO 1 2 Codenamed “Zeppelin”, AMD’s next-generation System-on-a-Chip (SoC) was designed for use in multiple products and packages in multiple markets, including server, mainstream PC desktop, and high-e
ISSCC 2018
Session 2
Digital Processors
An Energy-Efficient Reconfigurable DTLS Cryptographic Engine for End-to-End Security in IoT Applications
Layer Security (DTLS)
ISSCC 2018
Session 2
Digital Processors
A 595pW 14pJ/Cycle Microcontroller with Dual-Mode Standard Cells and Self-Startup for Battery-Indifferent Distributed Sensing
Battery-indifferent sensor nodes require continuous operation in spite of the intermittently available battery energy, and hence require low peak-power operation to fit the fluctuating power made available by the harvest
ISSCC 2018
Session 2
Digital Processors
A cm-Scale Self-Powered Intelligent and Secure IoT Edge Mote Featuring an Ultra-Low-Power SoC in 14nm Tri-Gate CMOS
Erkan Alpman1, Angela Nicoara1, Roman Popov1, Leonid Azarenkov1, Mikhail Moiseev1, Li Zhao1, Santosh Ghosh1, Rafael Misoczki1, Ankit Gupta2, Akhila M2, Sriram Muthukumar2, Saurabh Bhandari2, Yada Satish2, Kartik Jain2, R
ISSCC 2018
Session 20
Memory
A 512Gb 3b/Cell 3D Flash Memory on a 96-Word-Line-Layer Technology
Teruo Takagiwa1, Susumu Ozawa1, Jumpei Sato1, Yoshihiko Shindo1, Manabu Sato1, Naoaki Kanagawa1, Junji Musha1, Satoshi Inoue1, Katsuaki Sakurai1, Naohito Morozumi1, Ryo Fukuda1, Yuui Shimizu1, Toshifumi Hashimoto1, Xu Li
ISSCC 2018
Session 20
Memory
A Flash Memory Controller for 15μs Ultra-Low-Latency SSD Using High-Speed 3D NAND Flash with 3μs Read Time
Daehyun Kim, Chulseung Lee, Youra Choi, Shine Kim, Dongku Kang, Geunyeong Yu, Jaehong Kim, Jaechun Park, Ki-Whan Song, Ki-Tae Park, Sangyeun Cho, Hwaseok Oh, Daniel DG Lee, Jin-Hyeok Choi, Jaeheon Jeong Samsung Electroni
ISSCC 2018
Session 20
Memory
A 1Tb 4b/Cell 64-Stacked-WL 3D NAND Flash Memory with 12MB/s Program Throughput
Seungbum Kim, Kangbin Lee, Jisu Kim, Jiyoon Park, Han-Jun Lee, Minseok Kim, Seonyong Lee, SeonGeon Lee, Jinbae Bang, Dongjin Shin, Hwajun Jang, Deokwoo Lee, Nahyun Kim, Jonghoo Jo, Jonghoon Park, Sohyun Park, Youngsik Rh
ISSCC 2018
Session 21
Other
Mixed-Signal Programmable Non-Linear Interface for Resource-Efficient Multi-Sensor Analytics
many portable always-awake and multi-sensor systems, the power consumption is dominated by digital backend processing [1] for feature-computation and classification. Recent Analog-to-Information based innovations (see Fi
ISSCC 2018
Session 21
AI / ML
A 1μW Voice Activity Detector Using Analog Feature Extraction and Digital Deep Neural Network
Aurel A. Lazar, Mingoo Seok Columbia University, New York, NY Voice user interfaces (UIs) are highly compelling for wearable and mobile devices. They have the advantage of using compact and ultra-low-power (ULP) input de
ISSCC 2018
Session 21
Other
32GHz Resonant-Fin Transistors in 14nm FinFET Technology
of microelectromechanical resonators in IC technology has been explored extensively over the past few decades in the effort to achieve onchip clocks, RF filters, and physical, chemical, and biological sensors. Various ap
ISSCC 2018
Session 21
Other
A 10Gb/s Si-Photonic Transceiver with 150μW 120μs-Lock-Time Digitally Supervised Analog Microring Wavelength Stabilization for 1Tb/s/mm2 Die-to-Die Optical Networks
Guillaume Waltener1, Robert Polster1, Olivier Dubray1, Florent Lepin1, Stéphane Bernabé1, Sylvie Menezo1, Gabriel Parès1, Olivier Castany1, Laura Boutafa1, Philippe Grosse1, Benoît Charbonnier1, Charles Baudot2 CEA-LETI-
ISSCC 2018
Session 21
Other
A 286F2/Cell Distributed Bulk-Current Sensor and Secure Flush Code Eraser Against Laser Fault Injection Attack
and Technology, Ikoma, Japan 1 2 A sense-and-react closed-loop countermeasure is proposed against Laser Fault Injection (LFI) attack on a cryptographic processor core. A 286F2/cell distributed bulk-current sensor detects
ISSCC 2018
Session 21
Other
An 8-Channel 13GHz ESR-on-a-Chip Injection-locked VCO-array achieving 200μM-Concentration Sensitivity
University of Stuttgart, Stuttgart, Germany 1 2 Thanks to their unmatched specificity, methods based on magnetic resonance effects are amongst the most powerful spectroscopic techniques available today. Out of these meth
ISSCC 2018
Session 22
Data Converters
A 24-to-72GS/s 8b Time-Interleaved SAR ADC with 2.0-to-3.3pJ/conversion and >30dB SNDR at Nyquist in 14nm CMOS FinFET
Alessandro Cevrero1, Ilter Ozkaya1,3, Thomas Toifl1 IBM Zurich Research Laboratory, Rueschlikon, Switzerland ETH Zurich, Zurich, Switzerland; 3EPFL, Lausanne, Switzerland 1 2 Optical communication standards, such as ITU
ISSCC 2018
Session 22
Data Converters
A 16b 6GS/s Nyquist DAC with IMD <-90dBc up to 1.9GHz in 16nm CMOS
over a wide bandwidth while consuming low power and small area [1] - [6]. In this work, a 16b 6GS/s Nyquist current-steering DAC in 16nm CMOS is presented. Utilizing bounded INL calibration and thermometer DEM to tackle
ISSCC 2018
Session 22
Data Converters
A 16b 12GS/s Single/Dual-Rate DAC with Successive Bandpass Delta-Sigma Modulator Achieving <-67dBc IM3 Within DC-to-6GHz Tunable Passbands
The agile allocation of signal bands over RF frequencies and high in-band spectral purity (both SFDR and NSD) can enable higher-order modulation in highthroughput flexible wireless/wireline transmitters, where signals ar
ISSCC 2018
Session 23
Other
A -31dBc Integrated-Phase-Noise 29GHz Fractional-N Frequency Synthesizer Supporting Multiple Frequency Bands for Backward-Compatible 5G Using a Frequency Doubler and Injection-Locked Frequency Multipliers
high-bandwidth mobile communications, 5G technology is targeted to support data-rates up to 10Gb/s. To reach this goal, one of challenging tasks for wireless transceivers is to generate millimeter-wave (mmW) band LO sign
ISSCC 2018
Session 23
Other
A 22.8-to-43.2GHz Tuning-Less Injection-Locked Frequency Tripler Using Injection-Current Boosting with 76.4% Locking Range for Multiband 5G Applications
Future cross-network and international roaming are attractive in mm-wave fifthgeneration (5G) wireless networks with multiband operations. The generation of an ultra-wide-bandwidth ultra-low-phase-noise (PN) local oscill
ISSCC 2018
Session 23
Other
A 301.7-to-331.8GHz Source with Entirely On-Chip Feedback Loop for Frequency Stabilization in 0.13μm BiCMOS
King Abdulaziz City for Science and Technology, Riyadh, Saudi Arabia, 4 STMicroelectronics, Crolles, France 1 3 The THz band has shown its unique characteristics and great potential in many applications. Harmonic oscilla
ISSCC 2018
Session 23
Other
An Inverse-Class-F CMOS VCO with Intrinsic-High-Q 1st- and 2nd-Harmonic Resonances for 1/f2-to-1/f3 Phase-Noise Suppression Achieving 196.2dBc/Hz FOM
Rui P. Martins1,3 University of Macau, Macau, China University of Malaya, Kuala Lumpur, Malaysia 3 Instituto Superior Tecnico/University of Lisboa, Lisbon, Portugal 1 2 Second-harmonic common-mode (CM) resonance has been
ISSCC 2018
Session 23
Other
A Quad-Core 15GHz BiCMOS VCO with -124dBc/Hz
Fabio Padovan1, Fabio Quadrelli1,2, Matteo Bassi1, Marc Tiebout1, Andrea Bevilacqua2 Infineon Technologies, Villach, Austria University of Padova, Padova, Italy 1 2 The relentless development of next-generation communica
ISSCC 2018
Session 23
Other
A 7.4-to-14GHz PLL with 54fsrms Jitter in 16nm FinFET for Integrated RF-Data-Converter SoCs
Ying Cao1, Shaojun Ma1, Christophe Erdmann2, Brendan Farley2, Yohan Frans1, Ken Chang1 Xilinx, San Jose, CA; 2Xilinx, Dublin, Ireland 1 Direct-RF data converters [1,2] have seen increased adoption in remote-radiohead TX
ISSCC 2018
Session 24
Other
A 2MHz 150-to-400V Input Isolated DC-DC Bus Converter with Monolithic Slope-Sensing ZVS Detection Achieving 13ns Turn-On Delay and 1.6W Power Saving
Texas Instruments, Santa Clara, CA 1 2 The growing development of industrial power supplies demands DC-DC converters that are increasingly efficient and reliable. Industrial bus supplies that operate from a front-end PFC
ISSCC 2018
Session 24
Other
A Fully Integrated Three-Level 11.6nC Gate Driver Supporting GaN Gate Injection Transistors
Leibniz University Hannover, Hannover, Germany 1 2 Due to their superior fast-switching performance, GaN transistors show enormous potential to enable compact power electronics in applications like renewable energy, elec
ISSCC 2018
Session 24
Other
A 3-to-40V VIN 10-to-50MHz 12W Isolated GaN Driver with Self-Excited tdead Minimizer Achieving
Xugang Ke, D. Brian Ma University of Texas at Dallas, Richardson, TX High-frequency (fSW), wide-input (VIN) power converters have gained increasing popularity in automotive applications due to the heightening demand for