← 返回 JSSC 论文列表JSSC 2006第1期Digital Circuits90nm SOI
Overview of the Architecture Circuit Design and Physical Implementation of a Fir
本文探讨了当前和未来处理器面临的设计挑战，并提出了一种多核SoC架构解决方案。
高频时钟速率，多操作系统支持
处理器设计多核SoC高频时钟Power Architecture90nm SOI
▸64位Power Architecture处理器与多协同处理器结合
▸支持多操作系统的高灵活性IO接口
▸采用90nm SOI技术实现高频时钟
Abstract
This paper reviews the design challenges that current
and future processors must face, with stringent power limits,
high-frequency targets, and the continuing system integration
trends. This paper then describes the architecture, circuit design,
and physical implementation of a first-generation Cell processor
and the design techniques used to overcome the above challenges.
A Cell processor consists of a 64-bit Power Architecture processor
coupled with multiple synergistic processors, a flexible IO