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JSSC 2006第1期Other

XiSystem: A XiRisc-Based SoC With Reconfigurable IO Module Andrea Lodi, Andrea Cappelli, Massimo Bocchi, Claudio Mucci, Massimilano Innocenti, Claudia De Bartolomeis, Luca Ciccarelli, Roberto Giansante, Antonio Deledda, Fabio Campi, Mario Toma, and

XiSystem SoC集成可重构处理器和eFPGA,提升性能并降低能耗。
SoC可重构处理器eFPGAIO模块能耗优化
采用XiRisc可重构处理器实现性能提升和能耗降低
集成eFPGA支持多种IO端口和协议
可重构IO模块用于数据预处理和后处理
Abstract
In the nanometer era, the increase in nonrecurring engineering costs is a challenge for SoCs that can be faced through a standardization process. Hardware specialization of a standard platform to a given application can be achieved by exploiting recon- figurable technology. This paper presents a XiSystem SoC, which integrates two different field-programmable devices to provide ap- plication-specific computing blocks and IOs. A XiRisc reconfig- urable processor is exploited to achieve more than one order of magnitude speed-up and energy consumption reduction vis-à-vis a DSP-like processor, while an eFPGA is integrated in the system in order to make it flexible enough to support various IO ports and protocols. The reconfigurable IO device is also utilized for pre/post data processing and implementation of some standard computa- tional blocks.