← 返回 JSSC 论文列表JSSC 2006第2期RF & WirelessDelta-Sigma ADCDAC
FEBRUARY 2006 VOLUME 41 NUMBER 2 IJSCBC ISSN 0018-9200 A 600-MSs 5-Bit Pipeline
该期刊包含多篇关于高性能模拟与数字电路设计的论文，涵盖DAC、ADC、无线通信等领域。
600-MS/s, 14-Bit, 32-mW, 320-MHz
DACADC无线通信CMOS滤波器
▸600-MS/s 5-Bit Pipeline DAC设计
▸14-Bit DS ADC用于GSM/GPRS/EDGE
▸32-mW 320-MHz连续时间复数ΔΣ ADC
Abstract
-MS/s Binary-Weighted Current-Steering DAC ............... ............... J. Deveugele and M. S. J. Steyaert 320
A DLL-Biased, 14-Bit DS Analog-to-Digital Converter for GSM/GPRS/EDGE Handsets . . . ............ N. Klemmer and E. Hegazi 330
A 32-mW 320-MHz Continuous-Time Complex Delta-Sigma ADC for Multi-Mode Wireless-LAN Receivers . ...............
................ J. Arias, P . Kiss, V . Prodanov, V . Boccuzzi, M. Banu, D. Bisbal, J. San Pablo, L. Quintanilla, and J. Barbolla 339
Noise Analys