← 返回 JSSC 论文列表JSSC 2006第3期RF & Wireless0.18μm
A 4378 dBm IIP2 CMOS Direct Downconversion Mixer for Fully Integrated UMTS Recei
设计了一种用于UMTS接收器的低功耗高线性度CMOS下变频混频器
4378 dBm IIP2, 16-dB增益, 4.5-MHz输出带宽, -310-dBm带外IIP3, 4-nV/√Hz输入噪声密度, 4 mA@1.8V
CMOS混频器直接下变频线性度UMTS接收器第二代互调
▸电路创新：RC退化输入跨导器设计，通过电阻电容退化技术有效提升线性度，降低二阶互调失真，显著提高IIP2至4378 dBm。
▸电路创新：精确匹配输出电阻，通过优化电阻匹配减少非线性效应，提升整体电路的线性性能和信号完整性。
▸电路创新：调谐开关对共源极寄生电容，通过精确调谐消除寄生电容影响，进一步优化二阶互调性能，确保电路稳定性。
▸系统创新：全集成CMOS直接下变频混频器设计，无需外部SAW滤波器，降低成本并简化系统架构，适用于UMTS接收机。
Abstract
The demanding dynamic range required by receivers
for cell-phone applications makes the design of low-power fully
integrated CMOS solutions extremely challenging. Commercially
available third-generation (3G) products adopt a hybrid direct
conversion architecture, where an inter-stage surface acoustic
wave (SA W) filter between low noise amplifier (LNA) and mixer
attenuates out-of-band interferers, alleviating linearity require-
ments set on the downconversion mixer. As a drawback, an off-chip
comp