← 返回 JSSC 论文列表JSSC 2006第3期Digital Circuits0.18μmDelta-Sigma ADCNeural Network Accelerator
Analysis and Design of High-Performance Asynchronous Sigma-Delta Modulators With
高性能异步Sigma-Delta调制器的分析与设计，重点研究二进制量化器的实现与性能优化。
0.18μm CMOS, 1.8V, SFDR 75dB (8MHz), 72dB (12MHz), 功耗1.5mW/2.2mW
异步Sigma-Delta调制器极限环二进制量化器VDSLCMOS
▸深入分析异步Sigma-Delta调制器的极限环频率
▸探讨滤波器阶数对性能的影响
▸提出针对VDSL前端规格的电路实现方案
Abstract
Asynchronous sigma-delta modulators (ASDMs) are
closed-loop nonlinear systems that transform the information in
the amplitude of their input signal into time information in the
output signal, without suffering from quantization noise such as
in synchronous sigma-delta modulators. This is an important ad-
vantage with many interesting applications. In contrast with their
synchronous counterparts, ASDMs have been underexposed. Both
conceptually and analytically, they are quite complex. This paper