← 返回 JSSC 论文列表JSSC 2006第4期RF & Wireless0.13μm
A 0.13 /22m CMOS Front-End, for DCS1800/UMTS/ 802.11b-g With Multiband Positive Feedback Low-Noise Amplifier
本文提出了一种用于DCS1800/UMTS/802.11b-g的多频段CMOS前端,采用直接转换和低中频架构。
0.13μm CMOS, 1.2V, 20mA
CMOS前端多频段正反馈低噪声放大器线性混频器
▸创新点1:多频段低噪声放大器(LNA)采用正反馈技术提升增益(电路创新)。通过引入可控正反馈环路,在保持噪声系数(5.2 dB)的同时实现增益可编程(13.5-28.5 dB),解决了多标准接收机中增益与噪声的权衡问题。
▸创新点2:高度线性混频器设计(电路创新)。采用改进的跨导线性化技术,实现IIP3 > -7.5 dBm和IIP2 > 50 dBm,显著提升高频信号处理中的抗干扰能力,适用于密集频谱环境。
▸创新点3:双架构集成方案(系统创新)。在单芯片中融合直接转换(UMTS/802.11b-g)和100kHz低中频(DCS1800)两种架构,通过模式切换实现多标准兼容,降低系统复杂度。
▸创新点4:0.13μm CMOS工艺下的低功耗设计(工艺创新)。在1.2V供电下仅消耗20mA电流,通过优化偏置电路和动态偏置技术,实现高性能与低功耗的协同设计。
Abstract
This paper presents a fully integrated CMOS receiver front-end based on a direct conversion architecture for UMTS/802. 11b-g and a low-IF architecture at 100 kHz for DCS1800. The two key building blocks are a multiband low-noise amplifier (LNA) that uses positive feedback to improve its gain and a highly linear mixer. The front-end, integrated in a 0.13 m CMOS process, exhibits a minimum noise figure of 5.2 dB, a programmable gain that can be varied from 13.5 to 28.5 dB, an IIP3 of more than 7.5 dBm and an IIP2 better than 50 dBm. The total current consumption is 20 mA from a 1.2 V supply.