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An Energy-Efficient Analog Front-End Circuit for a Sub-1-V Digital Hearing
提出一种用于数字助听器的低功耗高效模拟前端电路，采用CGC和ASNR技术优化性能。
0.9V供电, 59.4-74.7μW功耗, 86dB峰值SNR, 0.5mm²核心面积
数字助听器模拟前端低功耗自适应信噪比组合增益控制
▸创新点1：采用组合增益控制(CGC)技术，该方法创新性地将自动增益控制(AGC)与指数增益控制(EGC)相结合，实现了精确的放大和阈值膝点电压控制，显著降低了功耗并提高了信号处理的准确性。
▸创新点2：自适应信噪比(ASNR)技术，该系统创新通过动态调整信噪比(SNR)以适应输入信号幅度，不仅优化了SNR性能，还进一步降低了功耗，特别适用于低电压(0.9V)应用场景。
▸创新点3：低功耗设计，该电路创新在0.9V单电源供电下实现了59.4μW至74.7μW的极低功耗，同时保持了86dB的峰值信噪比(SNR)和3.8μV的输入参考噪声电压，展现了出色的能效比。
▸创新点4：采用0.25μm标准CMOS工艺实现，该工艺创新在仅0.5mm²的核心面积内集成了高性能模拟前端电路，为数字助听器等便携式设备提供了高集成度解决方案。
Abstract
A low-power energy-efficient adaptive analog front-end circuit is proposed and implemented for digital hearing-aid applications. It adopts the combined-gain-control (CGC) technique for accurate preamplification and the adap- tive-SNR (ASNR) technique to improve dynamic range with low power consumption. The CGC technique combines an auto- matic gain control and an exponential gain control together to reduce power dissipation and to control both gain and threshold knee voltage. The ASNR technique changes the value of the signal-to-noise ratio (SNR) in accordance with input amplitude in order to minimize power consumption and to optimize the SNR by sensing an input signal. The proposed analog front-end circuit achieves 86-dB peak SNR in the case of third-order /6/1 modulator with 3.8- /86/114 /109 /115of input-referred noise voltage. It dissipates a minimum and maximum power of 59.4 and 74.7 W, respectively, at a single 0.9-V supply. The core area is 0.5 mm /50in a 0.25- m standard CMOS technology.