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JSSC 2006第4期Other90nm

Delay and Power Monitoring Schemes for Minimizing Power Consumption by Means of

提出动态控制供电电压和阈值电压的延迟与功耗监测方案,以最小化芯片功耗。
90nm CMOS
动态电压控制阈值电压调整功耗优化延迟监测待机模式
动态控制供电电压和阈值电压以优化功耗
基于延迟监测结果选择供电电压或阈值电压控制以避免振荡
改进待机模式下的功耗监测精度,考虑栅氧泄漏电流影响
Abstract
This paper describes newly developed delay and power monitoring schemes for minimizing power consumption by means of the dynamic control of supply voltage /68/68and threshold voltage /84/72in active and standby modes. In the active mode, on the basis of delay monitoring results, either /68/68control or /84/72 control is selected to avoid any oscillation problem between them. In /68/68control, on the basis of delay monitoring results, /68/68is adjusted so as to be maintained at the minimum va