JSSC 2006第4期Other0.15-μm FD-SOIDelta-Sigma ADC

Managing Subthreshold Leakage in Charge-Based Analog Circuits With Low- /86/84/72Transistors by Analog T- Switch (AT-Switch) and Super Cut-off CMOS (SCCMOS)

提出AT-switch方案抑制电荷基模拟电路亚阈值泄漏问题，提升调制器性能

8.1-dB SNDR提升

亚阈值泄漏电荷基模拟电路AT-switchsigma-delta调制器FD-SOI工艺

▸创新点1：AT-switch泄漏抑制方案（方法创新）。该方案通过引入模拟T开关（AT-switch）有效抑制了电荷基模拟电路中的亚阈值泄漏问题，特别是在开关电容和采样保持电路中，显著降低了非线性泄漏效应，提升了电路的信号噪声失真比（SNDR）达8.1 dB。

▸创新点2：与SCCMOS方案对比验证（系统创新）。论文通过实验对比了AT-switch与基于超截止CMOS（SCCMOS）的泄漏抑制方案，验证了AT-switch在改善SNDR方面的优势，而SCCMOS则主要提升了动态范围，为不同应用场景提供了优化选择。

▸创新点3：0.5V低电压工作（电路创新）。论文展示了在0.15μm FD-SOI工艺下实现0.5V低电压工作的Σ-Δ调制器，验证了AT-switch方案在超低电压环境下的可行性，为低功耗模拟电路设计提供了重要参考。

▸创新点4：非线性泄漏效应抑制（方法创新）。AT-switch方案通过优化电路结构，有效抑制了非线性泄漏效应，提升了电路的线性度和信号处理精度，为高性能模拟电路设计提供了新的技术路径。

Abstract

The analog T-switch (AT-switch) scheme is intro- duced to suppress subthreshold-leakage problems in charge-based analog circuits such as switched capacitors and sample-and-hold circuits. A 0.5-V sigma-delta modulator is manufactured in a 0.15- m FD-SOI process with low /84/72of 0.1 V using the concept. The scheme is compared with another leakage-suppression scheme based on super cut-off CMOS (SCCMOS) and the conventional circuit which are also fabricated. The sigma-delta modulator based on AT-switch greatly improves 8.1-dB SNDR through reducing nonlinear leakage effects while the modulator based on SCCMOS improves the dynamic range rather than the SNDR by comparing with the conventional sigma-delta modulator