JSSC 2006第5期RF & Wireless0.18μm

Highly Linear 018-22m CMOS Power Ampliﬁer With Deep n-Well Structure

采用深n阱结构提升0.18μm CMOS功率放大器线性度，显著降低谐波失真。

20 dBm P1dB, 18.7 dB功率增益, 31% PAE（单端）; 20.2 dBm P1dB, 18.9 dB功率增益, 35% PAE（差分）

CMOS功率放大器深n阱线性度谐波失真Volterra分析

▸采用深n阱（DNW）结构降低nMOS的栅源电容和漏结电容的非线性

▸通过小信号模型和Volterra级数分析优化非线性参数

▸单端和差分PA在2.45GHz WLAN应用中实现优异的线性度和效率

Abstract

The linearity of a 0.18- m CMOS power ampliﬁer (PA) is improved by adopting a deep n-well (DNW). To ﬁnd the reason for the improvement, bias dependent nonlinear parame- ters of the test devices are extracted from a small-signal model and a Volterra series analysis for an optimized nMOS PA with a proper matching circuit is carried out. From the analysis, it is re- vealed that the DNW of the nMOS lowers the harmonic distor- tion generated from the intrinsic gate-source capacitance /40 /41, which