← 返回 JSSC 论文列表JSSC 2006第6期Other90nmPower Amplifier
A 90-nm CMOS Doherty Power Amplifier With Minimum AM-PM Distortion
一种90nm CMOS Doherty功率放大器，通过优化载波和峰值放大器的器件尺寸比减少AM-PM失真，实现高线性度和高效率。
3.65 GHz, 12.5% PAE at 6 dB back-off, 28.9 dBm maximum output power, 39% PAE, 1.2 mm² active die area
Doherty功率放大器AM-PM失真CMOS线性度高效率
▸优化载波和峰值放大器的器件尺寸比以减少AM-PM失真
▸全集成设计，包括片上正交混合耦合器、阻抗变换器和输出匹配网络
▸适用于高峰均功率比系统（如WLAN、WiMAX）
Abstract
A linear Doherty amplifier is presented. The design
reduces AM-PM distortion by optimizing the device-size ratio
of the carrier and peak amplifiers to cancel each other’s phase
variation. Consequently, this design achieves both good linearity
and high backed-off efficiency associated with the Doherty tech-
nique, making it suitable for systems with large peak-to-average
power ratio (WLAN, WiMAX, etc.). The fully integrated design
has on-chip quadrature hybrid coupler, impedance transformer,
and out