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Baseband and Audio Mixed-Signal Front-End IC for GSM/EDGE Applications
一款支持GSM/EDGE和增强音频应用的混合信号前端CMOS芯片。
1.5/2.65V供电, 22mW待机功耗, 12.5bit ADC精度
混合信号前端GSM/EDGEGMSK调制ΔΣ ADC音频编解码器
▸基于Laurent近似的非线性GMSK调制器实现发射段突发整形
▸低功耗双模连续时间ΔΣ ADC支持ZIF和LIF模式
▸集成时钟抖动抑制的片上PLL
Abstract
A complete mixed-signal front-end CMOS chip is presented, supporting GSM/EDGE as well as enhanced audio applications. The chosen solution for the transmit section is based on Laurent’s approximation of the nonlinear GMSK modulator. This enables burst shaping in the I/Q domain thereby solving the problem of power ramping. Also, up to GPRS class 12 is supported. The receive section on the other hand consists of a low power dual mode continuous-time /6/1 ADC for I and Q, sup- porting ZIF and LIF modes of operation and achieving typically 12.5 bit of resolution under production conditions. An on-chip PLL, which supplies all blocks with various clock frequencies, additionally supports clock jitter suppression. The audio section comprises a codec supporting standard formats such as IIS and PCM. It features mono/stereo signaling from various sources in 16 bit quality as well as high-drive buffers for 4 /10single-ended loads (capacitively coupled). The whole chip is powered from a 1.5/2.65 V supply voltage and consumes 22 mW in paging mode.