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Patent Abstracts The Patent Abstracts and References cited are intended to provide the minimum information necessary for determining interest. The full text and images can be obtained from the U.S. Patent Office at http:// www.uspto.gov. 6,960,940 November 1, 2005 Short Circuit Protection Apparatus With Self-Clocking Self-Clearing Latch Inventors: Joseph D. Wert (Arlington, TX) and Angela H. Wang (San Jose, CA)
一种用于检测输入信号状态转换并生成自清除复位信号的锁存器
未明确提及
锁存器短路保护自清除状态转换检测复位信号
▸创新点1：电路创新 - 自时钟自清除锁存器设计，通过集成时钟和清除功能，简化了电路结构，提高了系统的可靠性和响应速度。
▸创新点2：方法创新 - 状态转换检测与复位信号生成，采用高效的检测机制，确保在输入信号状态变化时迅速生成复位信号，增强了系统的实时性。
▸创新点3：系统创新 - 反馈回路实现节点状态自动恢复，通过反馈机制自动将节点状态恢复到初始状态，减少了外部干预，提高了系统的自愈能力。
▸创新点4：电路创新 - 转移门设计，优化了信号传递路径，减少了信号延迟和功耗，提升了整体电路性能。
Abstract
g interest. The full
text and images can be obtained from the U.S. Patent Office at http://
www.uspto.gov.
6,960,940 November 1, 2005
Short Circuit Protection Apparatus With
Self-Clocking Self-Clearing Latch
Inventors: Joseph D. Wert (Arlington, TX) and Angela H. Wang
(San Jose, CA)
Assignee: National Semiconductor Corporation (Santa Clara, CA)
Filed: May 3, 2004.
Current U.S. Class: 327/47; 327/49; 327/156;
327/163
Intern’l Class: H03K 9/06
Field of Search: 327/47,49,156,163
References Cited
U.S