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A Time-Interleaved Continuous-Time /1/6Modulator With 20-MHz
首次实现时间交错连续时间ΔΣ调制器，支持20MHz信号带宽。
0.18μm CMOS, 100/200MHz采样频率, 57dB SNDR (10MHz带宽), 49dB SNDR (20MHz带宽), 101/103mW功耗
时间交错连续时间ΔΣ调制器CMOS信号带宽动态范围
▸时间交错连续时间ΔΣ调制器的首次实现
▸从离散时间ΔΣ调制器推导出连续时间版本
▸单积分器路径设计增强对直流偏移的鲁棒性
Abstract
This paper presents the first implementation results for a time-interleaved continuous-time /1/6 modulator. The derivation of the time-interleaved continuous-time/1/6modulator from a discrete-time /1/6 modulator is presented. With various simplifications, the resulting modulator has only a single path of integrators, making it robust to DC offsets. A time-interleaved by 2 continuous-time third-order low-pass /1/6 modulator is designed in a 0.18- m CMOS technology with an oversampling ratio of 5 at sampling frequencies of 100 and 200 MHz. Experimental results show that a signal-to-noise-plus-distortion ratio (SNDR) of 57 dB and a dynamic range of 60 dB are obtained with an input bandwidth of 10 MHz, and an SNDR of 49 dB with a dynamic range of 55 dB is attained with an input bandwidth of 20 MHz. The power consumption is 101 and 103 mW, respectively.