← 返回 JSSC 论文列表JSSC 2006第8期RF & Wireless0.18μmLNA
A 0.18-/22m CMOS Selective Receiver Front-End for UWB Applications
本文提出了一种用于UWB应用的0.18μm CMOS选择性接收前端，解决了5-6GHz WLAN干扰问题。
1.8V, 10mA, 1dB增益去敏化, 6.5dBm干扰功率, 5.2-7.7dB噪声系数, 3.5dBm IIP3
超宽带WLAN干扰抑制低噪声放大器正交混频器CMOS
▸采用双峰单陷波网络放大UWB信号并抑制WLAN干扰
▸基于合并正交拓扑的混频器实现二阶低通滤波
▸单端电压-电压反馈低噪声放大器设计
Abstract
This paper addresses the problem of 5–6-GHz WLAN interferer rejection in a direct-conversion receiver front-end for multi-band orthogonal frequency division multiplexing (OFDM) ultra-wideband (UWB) applications. The IC, realized in a 0.18- m CMOS technology, comprises a single-ended voltage–voltage feed- back low-noise amplifier (LNA) and a quadrature mixer. The LNA employs a double-peak single-notch network in the output load, amplifying UWB groups #1 and #3, while rejecting WLAN interferes in the 5–6-GHz frequency range. The mixer, based on a merged quadrature topology, also realizes a second-order low-pass filtering. Fabricated dies have been bonded on PCB for characterization. The front-end, drawing 10 mA from 1.8 V , achieves a 1-dB gain desensitization with a 6.5-dBm interferer power at 5.5 GHz. Other measured performances are 5.2-dB and 7.7-dB minimum and maximum noise figure (NF), 3.5-dBm minimum IIP3 and /4334.5-dBm minimum in-band IIP2 and /4321-dBm out-of-band IIP2.