← 返回 JSSC 论文列表JSSC 2006第9期Memory0.18μmProcessor/CPU
A 32-KB Standard CMOS Antifuse One-Time Programmable ROM Embedded in a 16-bit Mi
设计并实现了一种嵌入16位微控制器的32KB标准CMOS一次性可编程ROM。
32KB OTP ROM, 9.9 mm²芯片面积
CMOSOTP ROM微控制器三晶体管单元高密度
▸创新点1：电路创新 - 采用三晶体管（3T）OTP单元结构，结合薄栅氧化层反熔丝、高压阻断晶体管和访问晶体管，实现了高可靠性和低功耗的OTP ROM设计。
▸创新点2：方法创新 - 通过优化布局和工艺兼容性，将3T OTP单元尺寸减少了80%，显著提高了存储密度，适用于高密度嵌入式应用。
▸创新点3：系统创新 - 设计并实现了32-KB OTP ROM与16位微控制器的集成，支持外部I2C主设备编程，增强了系统的灵活性和可扩展性。
▸创新点4：工艺创新 - 采用标准0.18μm CMOS工艺，确保OTP ROM与现有CMOS工艺完全兼容，降低了制造成本和复杂性。
Abstract
A 32-KB standard CMOS antifuse one-time pro-
grammable (OTP) ROM embedded in a 16-bit microcontroller
as its program memory is designed and implemented in 0.18-
m
standard CMOS technology. The proposed 32-KB OTP ROM cell
array consists of 4.2
m/50three-transistor (3T) OTP cells where
each cell utilizes a thin gate-oxide antifuse, a high-voltage blocking
transistor, and an access transistor, which are all compatible with
standard CMOS process. In order for high density implementa-
tion, the size