← 返回 JSSC 论文列表JSSC 2006第9期Wireline I/O0.2μm SOI SiGe HBT
Notice of Violation of IEEE Publication Principles A 125 Gbs Electro-Absorption-
采用60GHz SOI SiGe HBT工艺实现9.953-12.5 Gb/s EAM驱动IC,优化开关速度和低电压操作。
20-120mA调制电流, 1-60mA偏置电流, 15ps抖动, 25ps上升/下降时间, 4.75-5.5V供电
EAM驱动SiGe HBT级联开关共模反馈自适应补偿
▸创新点1:采用级联输出开关技术,显著减少预驱动级的电容负载,提升开关速度至15 ps确定性抖动水平,属于电路结构创新
▸创新点2:通过共模反馈环路生成调制电流,实现低至1.3V的工作电压,同时支持20-120mA宽范围调制电流,属于偏置电路设计创新
▸创新点3:开发自适应RC补偿网络,动态跟踪调制电流变化,有效消除末级射极跟随器的电感效应,改善高频响应特性,属于稳定性优化创新
▸创新点4:采用动态偏置技术,根据电源电压/温度/工艺角自动分配级联器件的工作裕度,在4.75-5.5V供电范围内保持最佳性能,属于可靠性增强创新
Abstract
A 9.953–12.5 Gb/s EAM driver IC was realized in a
60 GHz /102/84 0.2
m SOI SiGe HBT process. Fast switching was
achieved by using a cascode output switch that minimizes the ca-
pacitive load on the pre-driver and also allows an on-chip sum-
mation of the bias and modulation currents without degrading the
signal path bandwidth. Low voltage operation was achieved by
generating the modulation current with a common-mode feedback
loop. Dynamic biasing was used to optimally allocate the headroom
volt