← 返回 JSSC 论文列表JSSC 2006第10期Digital Circuits0.18-μm SiGe BiCMOSNeural Network Accelerator
Design Methodology for a 40-GSampless Track and Hold Amplifier in 018- 22m SiGe B
设计了一种40-GSamples/s的跟踪保持放大器，采用0.18-μm SiGe BiCMOS工艺，功耗540mW，面积1.1mm²。
40-GSamples/s, 540mW, 1.1mm², 43 GHz带宽
跟踪保持放大器高速采样SiGe BiCMOS带宽功耗
▸40-GSamples/s高速采样
▸0.18-μm SiGe BiCMOS工艺
▸43 GHz带宽
Abstract
A 40-GSamples/s track and hold amplifier (THA) is
designed and fabricated in 0.18-
m SiGe BiCMOS and operates
from a 3.6-V supply. The total power consumption is 540 mW with
a chip area of 1.1 mm
/50. Time domain measurements demonstrate
40-GHz sampling and /83-parameter measurements show a 3-dB
bandwidth of 43 GHz in track mode. For 19-GHz input signals, a
total harmonic distortion of
27 dB at the 1dB compression point
has been measured and a spurious-free dynamic range of 35 dB has
been achiev