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JSSC 2006第11期Clocking & PLLs0.18μm

A 231-MHz 218-mW 32-bit Logarithmic Arithmetic Unit for Fixed-Point 3-D Graphics

提出一种用于移动3D图形系统的32位定点对数运算单元,支持多种运算并优化精度。
231 MHz, 218 mW, 1.8-V supply
对数运算单元3D图形定点运算低功耗CMOS
两周期完成除法、倒数、平方根等运算
八区域分段线性近似模型降低误差至0.2%以下
可编程数值范围适应3D图形管线需求
Abstract
A 32-bit fixed-point logarithmic arithmetic unit is proposed for the possible application to mobile three-dimensional (3-D) graphics system. The proposed logarithmic arithmetic unit performs division, reciprocal, square-root, reciprocal-square-root and square operations in two clock cycles and powering operation in four clock cycles. It can program its number range for accurate computation flexibility of 3-D graphics pipeline and eight -region piecewise linear approximation model for logarithmic a