← 返回 JSSC 论文列表JSSC 2006第12期RF & Wireless130nmDelta-Sigma ADC
A 20-mW 640-MHz CMOS Continuous-Time 61ADC With 20-MHz Signal Bandwidth 80-dB Dy
一款20mW功耗、640MHz工作频率的连续时间61ADC，具有20MHz信号带宽和80dB动态范围。
130nm CMOS, 1.2V, 20-40MS/s, 76dB SNR, 78dB THD, 74dB SNDR, 12 ENOB
连续时间ADCSigma-Delta调制器时钟抖动低功耗宽带信号处理
▸采用非归零(NRZ) DAC脉冲整形降低时钟抖动敏感度
▸新型架构避免因额外环路延迟导致的调制器稳定性下降
▸集成低抖动LC PLL提供高精度时钟
Abstract
A wide bandwidth continuous-time sigma-delta ADC,
operating between 20 and 40 MS/s output data rate, is imple-
mented in 130-nm CMOS. The circuit is targeted for applications
that demand high bandwidth, high resolution, and low power, such
as wireless and wireline communications, medical imaging, video,
and instrumentation. The third-order continuous-time
/6/1 mod-
ulator comprises a third-order RC operational-amplifier-based
loop filter and 4-bit internal quantizer operating at 640 MHz. A
400-fs