A Fully Integrated 20-Gb/s Optoelectronic Transceiver Implemented in a Standard 0.13-/22m CMOS SOI Technology

Abstract

A dual-channel 10 Gb/s per channel single-chip opto- electronic transceiver has been demonstrated in a 0.13- m CMOS SOI technology. The transceiver integrates conventionally discrete optoelectronic functions such as high-speed 10-Gb/s electro-optic modulation and 10-Gb/s optical reception on an SOI substrate using a standard CMOS process. The high optical index contrast between silicon /40 /61/51 /53/41and its oxide /40 /61/49 /53/41allows for very large scale integration of optical devices, while the use of a standard CMOS process allows these devices to be seamlessly fabricated together with electronics on the same substrate. Such a high level of optoelectronic integration is unprecedented, and serves to substantially reduce system footprint and power dissi- pation, allowing efficient scaling to higher data rates and broader functionality. This paper describes the photonic components, electronic blocks, and architecture of a CMOS photonic transceiver that achieves an aggregate data rate of 20 Gb/s in a dual-channel package, with a BER of less than 10 /49/53and a power con- sumption of 1.25 W per channel with both channels operating simultaneously.