JSSC 2006第12期RF & Wireless0.13μmVCO

Single-Stage Low-Power Quadrature RF Receiver Front-End: The LMV Cell

单级低功耗正交射频接收前端，集成LNA、混频器和VCO，共享偏置电流。

0.13μm CMOS, 1.2V, 5.4mW, 4.8dB NF, 36dB增益, -19dBm IIP3

正交射频接收机低功耗单级设计LC振荡器GPS

▸创新点1：单级集成LNA、混频器和VCO（系统创新）。通过将低噪声放大器、混频器和压控振荡器集成在单一电路级中，显著减少了传统多级架构的复杂性和功耗，实现了36 dB增益和4.8 dB噪声系数的高性能指标。

▸创新点2：共享偏置电流设计（电路创新）。LNA、混频器和VCO共享同一偏置电流，优化了功耗效率，在1.2 V电源电压下仅消耗5.4 mW总功率，适用于低电压CMOS工艺。

▸创新点3：利用LC振荡器固有混频功能（方法创新）。通过挖掘LC谐振腔的天然非线性特性实现混频，省去了独立混频器模块，既节省面积又降低了相位噪声和功耗。

▸创新点4：兼容低电压工艺的技术实现（电路创新）。在0.13μm CMOS工艺下实现-19 dBm的IIP3线性度，证明了该架构在先进工艺节点中的可扩展性和实用性。

Abstract

This paper presents the ﬁrst quadrature RF receiver front-end where, in a single stage, low-noise ampliﬁer (LNA), mixer and voltage-controlled oscillator (VCO) share the same bias current. The new structure exploits the intrinsic mixing functionality of a classical LC tank oscillator providing a compact and low-power solution compatible with low-voltage technologies. A 0.13- m CMOS prototype tailored to the GPS application is presented. The experimental results exhibit a noise ﬁgure of 4.8 dB, a gain of 36 dB, an IIP3 of 19 dBm with a total power consumption of only 5.4 mW from a voltage supply of 1.2 V.