A Low-Power Integrated Circuit for a Wireless 100-Electrode Neural

Abstract

Recent work in field of neuroprosthetics has demon- strated that by observing the simultaneous activity of many neu- rons in specific regions of the brain, it is possible to produce con- trol signals that allow animals or humans to drive cursors or pros- thetic limbs directly through thoughts. As neuroprosthetic devices transition from experimental to clinical use, there is a need for fully-implantable amplification and telemetry electronics in close proximity to the recording sites. To address these needs, we devel- oped a prototype integrated circuit for wireless neural recording from a 100-channel microelectrode array. The design of both the system-level architecture and the individual circuits were driven by severe power constraints for small implantable devices; chronically heating tissue by only a few degrees Celsius leads to cell death. Due to the high data rate produced by 100 neural signals, the system must perform data reduction as well. We use a combination of a low-power ADC and an array of “spike detectors” to reduce the transmitted data rate while preserving critical information. The complete system receives power and commands (at 6.5 kb/s) wire- lessly over a 2.64-MHz inductive link and transmits neural data back at a data rate of 330 kb/s using a fully-integrated 433-MHz FSK transmitter. The 4.7 5.9 mm /50chip was fabricated in a 0.5- m 3M2P CMOS process and consumes 13.5 mW of power. While cross-chip interference limits performance in single-chip op- eration, a