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Energy-Efficient GHz-Class Charge-Recovery Logic
提出Boost Logic，一种在1 GHz以上时钟频率下高效运行的电荷恢复逻辑电路家族。
0.13μm CMOS, 1.5V/1.2V, 1.3GHz
电荷恢复逻辑能效优化GHz级时钟电压缩放片上电感
▸GHz级电荷恢复逻辑：通过电荷恢复技术在GHz级时钟频率下实现高效能量回收，相比传统静态CMOS电路提升5倍能效（方法创新）
▸电压缩放与门过驱动技术：结合电压缩放和门过驱动技术，在0.13微米工艺下实现1.5V供电的1.3GHz高频操作（电路创新）
▸片上电感集成：采用片上电感实现850MHz谐振频率下的60%电荷回收率，提升系统集成度（系统创新）
▸能效与延迟权衡优化：通过牺牲3倍延迟换取5倍能效提升，为高频应用提供新的能效优化方案（方法创新）
Abstract
In this paper, we present Boost Logic, a charge- recovery circuit family that can operate efficiently at clock fre- quencies in excess of 1 GHz. To achieve high energy efficiency, Boost Logic relies on a combination of aggressive voltage scaling, gate overdrive, and charge-recovery techniques. In post-layout simulations of 16-bit multipliers with a 0.13- m CMOS process at 1 GHz, a Boost Logic implementation achieves 5 times higher en- ergy efficiency than its minimum-energy pipelined, voltage-scaled, static CMOS counterpart at the expense of 3 times longer latency. In a fully integrated test chip implemented using a 0.13- m bulk silicon process and on-chip inductors, chains of Boost Logic gates operate at clock frequencies up to 1.3 GHz with a 1.5-V supply. When resonating at 850 MHz with a 1.2-V supply, the Boost Logic test chip achieves 60% charge-recovery.