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JSSC 2007第2期Power ManagementInP DHBT

36-GHz, 16 6-Bit ROM in InP DHBT Technology Suitable for DDS Application

采用InP DHBT技术实现的36 GHz 6位ROM,适用于DDS应用
3.8V电源,功耗1.13W,最高工作频率36GHz
ROMInP DHBTDDS相位到幅度转换高速操作
采用InP双异质结双极晶体管(DHBT)技术
适用于直接数字合成器(DDS)的相位到幅度转换
36 GHz高速操作
Abstract
A1 6 6-bit read-only memory (ROM), employing an architecture suitable for use as a phase to amplitude converter for direct digital synthesizers (DDS), has been implemented in InP double heterojunction bipolar transistor (DHBT) technology. The ROM uses a 3.8 V power supply and dissipates 1.13 W of power. The ROM is implemented in a test circuit that includes an 8-bit accumulator and a 6-bit digital-to-analog converter (DAC) to facilitate demonstration of high-speed operation. The maximum operating clock frequency is measured to be 36 GHz.