JSSC 2007第2期Wireline I/O

Crosstalk Countermeasures for High-Density Inductive-Coupling

高密度电感耦合通道阵列的串扰对策研究

1 Gb/s/channel, BER < 10^-12

电感耦合串扰高密度阵列时间交织比特误码率

▸创新点1：通过嵌入式电压检测器在测试芯片上精确测量和分析电感耦合串扰，提出干扰信号比（ISR）的测量与计算方法，验证了理论与实测结果的高度一致性（>90%），为高密度阵列设计提供了量化依据。

▸创新点2：提出基于空间布局优化的串扰抑制方法，通过实验确定临界间距（50μm），证明该间距下串扰可忽略不计，并首次实现17通道阵列在此间距下的稳定工作（BER<10^-12），属系统级创新。

▸创新点3：开发时间交织技术的新型时序控制电路，通过错峰传输降低相邻通道电磁耦合干扰，使1Gb/s/channel速率下的ISR降低40%，属于信号处理层面的方法创新。

▸创新点4：集成上述技术实现全系统突破，在3D堆叠芯片中完成全球最小间距（50μm）多通道阵列验证，达成单通道1Gb/s超高速率与超低误码率的兼得，推动电感耦合技术走向实用化。

Abstract

Inductive coupling among stacked chips in a package enables 1 Gb/s/channel data communications. Array arrangement of the channel increases data bandwidth, while signal may be degraded by crosstalk. In this paper, crosstalk is measured and analyzed, and crosstalk countermeasures are discussed. Received signal waveforms through the inductive coupling are measured by embedded voltage detectors on a test chip. Interference-to-signal ratio (ISR) has good agreement between the measurements and calculations. It is found that crosstalk is reduced negligibly at a certain distance. If the channels are arranged at intervals of this distance, ISR is minimized. A technique based on time interleaving is also proposed to further reduce crosstalk. A 3 17 channel array is implemented with the crosstalk countermeasures. The channel pitch is taken down to 50 m. Inter-chip communication with data rate of 1 Gb/s/channel and bit error rate (BER) lower than 10 /57is demonstrated.