← 返回 JSSC 论文列表JSSC 2007第3期Digital Circuits0.35μmNeural Network AcceleratorOp-Amp
1-V Rail-to-Rail CMOS OpAmp With Improved Bulk-Driven
1V电源轨至轨CMOS运算放大器,采用改进的体驱动输入级设计
0.35μm CMOS, 1V供电, 76dB增益, 8MHz带宽
低电压运算放大器轨至轨输入体驱动技术正反馈跨导增强AB类输出级
▸体驱动输入级扩展输入共模电压范围
▸部分正反馈环路增强跨导
▸静态反馈偏置的推挽输出级实现AB类工作
Abstract
This paper introduces a CMOS operational amplifier with rail-to-rail input and output voltage ranges, suitable for op- eration in extremely low-voltage environments. The approach is based on a bulk-driven input stage with extended input common- mode voltage range, in which the effective input transconductance is enhanced by means of a partial positive feedback loop. As a result, a gain and gain-bandwidth product performance similar to that of an amplifier using a gate-driven approach is obtained. Output rail-to-rail operation is achieved by means of a push-pull stage, which is biased in class-AB by using a static feedback loop, thus avoiding frequency limitations inherent in dynamic-feedback tuning schemes. The proposed two-stage operational amplifier was designed to operate with a 1-V supply, and a test chip prototype was fabricated in 0.35- m standard CMOS technology. The exper- imental performance features an open-loop DC gain higher than 76 dB and a closed-loop unity-gain bandwidth above 8 MHz when a 1-M /10 17-pF load is connected to the amplifier output.