A 0.25-/22m CMOS 1.9-GHz PHS RF Transceiver With a 150-kHz Low-IF Architecture

Abstract

We present a 1.9-GHz Personal Handy-phone System (PHS) transceiver, fully integrated and fabricated in 0.25- m CMOS technology. The receiver is based on a 150-kHz low-IF architecture and meets the fast channel switching and DC-offset cancellation requirements of PHS. It includes a low-noise am- plifier (LNA), a downconversion mixer, a complex filter, and a programmable gain amplifier. A fractional- N frequency synthe- sizer achieves seamless handover with a 25 s channel switching time and a phase noise of -121 dBc/Hz at a 600-kHz offset fre- quency, with compliant ACS performance. The receiver provides 105 dBm sensitivity and 55 dBc ACS at a 600-kHz frequency offset. The transmitter is based on the direct modulation archi- tecture and consists of an upconversion mixer and a pre-driver stage. The gain of the pre-driver is digitally controllable to suit any type of commercial power amplifier. The transmitter shows a 3% EVM and a 65 dBc ACPR at a 600-kHz offset frequency. The whole transceiver occupies 15.2 mm /50and dissipates 70 mA in RX and 44 mA in TX, with a 2.8-V supply.