An SC V oltage Doubler with Pseudo-Continuous Output Regulation Using a Three-Stage

Abstract

This paper presents a switched-capacitor voltage doubler using pseudo-continuous control (PCC). The proposed PCC does not require extra power transistor to continuously reg- ulate the output of the doubler, thereby saving chip area. The PCC also allows the doubler to operate at lower switching frequencies without sacrificing transient response. The light-load efficiency of the regulated doubler can thus be enhanced by reducing the switching power loss. In addition, a three-stage switchable opamp with time-multiplexed enhanced active-feedback frequency com- pensation is developed to implement the controller. The proposed implementation enhances the speed of the loop response and then improves the load transient response of the regulated doubler. The SC voltage doubler with the proposed PCC controller has been fabricated in a 0.6- m CMOS process. The regulated doubler achieves 87% power efficiency even for the load current of 5 mA. By operating the doubler at switching frequency of 200 kHz and using a output capacitor of 2.2 F, a maximum output ripple of 20 mV is maintained for the load current changing from 50 mA to 150 mA. The output transient recovery time of the regulated doubler is 25 s with load-current step changes of 100 mA/1 s.