▸创新点1：无锁存流水线技术（方法创新） - 提出了一种无需传统锁存器的流水线技术，通过调制门电路和其他逻辑功能的传播延迟来生成事件吸引器，显著简化了电路结构并提高了时序效率。
▸创新点2：事件吸引器减少时序不确定性（电路创新） - 利用事件吸引器动态调整时序事件，使数据路径中的事件与时序事件同步，有效降低了时序不确定性，提升了流水线的稳定性和可靠性。
▸创新点3：支持独立计算波（系统创新） - 实现了两个独立计算波的并行处理，仅通过冲浪效应分离，无需额外的锁存器或存储元件，展示了高并发的计算能力。
▸创新点4：长时间无错误运行（性能创新） - 芯片在连续运行48小时以上且处理超过50/49/48/49/53次冲浪事件后未出现任何错误，验证了技术的鲁棒性和稳定性。
Abstract
Surfing is a latchless pipelining technique where the propagation delays of gates and other logic functions are modu- lated to produce event attractors. Timing events are propagated along the pipeline and events in the data path are attracted to coin- cide with the timing events. These attractors reduce timing uncer- tainties and can reduce the delays of the pipeline. We demonstrate surfing by the design, fabrication, and test of a chip. The surfing ring in this chip supports two independent waves of computation separated only by the surfing effect—no latches or other storage el- ements are used. We operated the ring for over 48 h and /50 /49/48/49/53 surfing events and never observed an error.