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A Low-Power Unified Arithmetic Unit for Programmable Handheld 3-D
开发了一种低功耗、面积高效的四路32位多功能算术单元，用于手持3D图形系统的可编程着色器。
0.18μm CMOS, 1.8V, 210MHz, 15.3mW
低功耗多功能算术单元对数数系统手持3D图形可编程着色器
▸采用对数数系统（LNS）实现单周期吞吐和低功耗统一复杂算术运算
▸提出24区和16区分段线性对数和反对数转换器，最大转换误差分别为0.8%和0.02%
▸所有支持的操作误差小于6.3%，统一到单算术平台，最大四周期延迟和单周期吞吐
Abstract
A low-power, area-efficient four-way 32-bit multi- function arithmetic unit has been developed for programmable shaders for handheld 3-D graphics systems. It adopts the logarithmic number system (LNS) at the arithmetic core for the single-cycle throughput and the small-size low-power uni- fication of various complicated arithmetic operations such as power, logarithm, trigonometric functions, vector-SIMD multi- plication, division, square root and vector dot product. 24-region and 16-region piecewise linear logarithmic and antilogarithmic converters are proposed with 0.8% and 0.02% maximum con- version error, respectively. All the supported operations are implemented with less than 6.3% operation error and unified into a single arithmetic platform with maximum four-cycle latency and single-cycle throughput. A 93 K gate test chip is fabricated using one-poly five-metal 0.18- m CMOS technology. It operates at 210 MHz with maximum power consumption of 15.3 mW at 1.8 V.