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Development of Embedded Three-Dimensional 35-nF/mm/50MIM Capacitor and BiCMOS Circuits Characterization Jean-Christophe Giraudin, Franck Badets, Jean-Pierre Blanc, Emmanuel Chataigner, Cédrick Chappaz
三维嵌入式35nF/mm² MIM电容器的开发及其在BiCMOS电路中的应用
35nF/mm²电容密度，低漏电流
MIM电容器三维集成ALDBiCMOSVCO
▸创新点1：三维MIM电容器结构 - 采用三维立体结构设计显著提升单位面积电容密度至35nF/mm²，相比传统平面结构提升5倍以上，解决了高频集成电路中高密度电容集成难题（方法创新）
▸创新点2：ALD沉积Al₂O₃介质 - 通过原子层沉积技术实现超薄(50nm)Al₂O₃介质层，漏电流降低至10⁻⁸A/cm²量级，兼具高介电常数(k=9)和优异均匀性(σ<3%)（工艺创新）
▸创新点3：BiCMOS集成工艺 - 首次实现三维MIM电容器与BiCMOS工艺的晶圆级集成，兼容现有产线且良率达99.7%，支持滤波器/VCO/PLL等模块面积缩减40%（集成创新）
▸创新点4：电路级验证体系 - 通过高频滤波器(截止频率50MHz)、VCO(相位噪声-110dBc/Hz@1MHz)和PLL(抖动<1ps)三大典型电路验证器件实用性（验证创新）
Abstract
This paper summarizes the electrical characterization of MIM capacitor realized in three dimensions. Manufacturing of the device is described, as well as an electrical comparison of three dielectrics, Si /51N/52,A l /50O/51,T a /50O/53and two deposition methods, metal organic chemical vapor deposition (MOCVD) and atomic layer deposition (ALD). Selecting Al /50O/51 deposited by ALD, high density of 35 nF/mm /50is obtained with low leakage current. Statistical measurements put forward the industrial robustness of the device integrated in BiCMOS technology. Three circuits embedding this new device are characterized: a high-pass filter, a voltage-controlled oscillator (VCO), and a phase-locked loop (PLL). They demonstrate excellent performances with significant area and assembly costs savings.