JSSC 2007第10期RF & Wireless90nmDAC

A Digital Envelope Modulator for a WLAN OFDM Polar Transmitter in 90 nm CMOS

研究了一种用于802.11a/g WLAN OFDM标准的数字包络调制器，采用90nm CMOS工艺实现。

90nm CMOS, 1.2V, 5dBm输出功率, 12.7mW功耗

数字包络调制器WLANOFDMCMOSDAC

▸创新点1：优化数字包络调制器处理包络信号（方法创新）。通过改进数字信号处理算法，显著提升了包络信号的调制效率和精度，适用于802.11a/g WLAN OFDM标准，实现了54 Mb/s的传输速率和64 QAM调制。

▸创新点2：实现温度计编码包络DAC（电路创新）。采用温度计编码技术设计DAC，有效降低了非线性失真和量化噪声，提升了信号质量，同时满足EVM和频谱掩模要求。

▸创新点3：结合外置功放提升输出功率（系统创新）。通过将数字包络调制器与外置功率放大器结合，输出功率提升至20.4 dBm，同时保持低功耗（12.7 mW @ 1.2 V），适用于软件定义无线电发射机。

▸创新点4：采用90 nm CMOS工艺实现高集成度（工艺创新）。在90 nm CMOS工艺下实现了高集成度的数字包络调制器，为未来进一步优化和规模化生产提供了技术基础。

Abstract

A digital envelope modulator as part of a polar trans- mitter architecture for the 802.11a/g WLAN OFDM standards is investigated. The digital envelope modulator is quite similar to a state-of-the-art DAC design, but now it has been optimized to deal with envelope signals. A thermometer-coded envelope DAC has been implemented in a 90 nm digital CMOS process. Measure- ments of a test chip show the digital envelope modulator to reach an OFDM output power of 5 dBm for 54 Mb/s using 64 QAM at 2.45 GHz and fulﬁlling EVM speciﬁcations and in-band spectral mask requirements using just 12.7 mW from a 1.2 V supply. Combining the digital envelope modulator with an off-chip power ampliﬁer gives an output power of 20.4 dBm, while fulﬁlling EVM speciﬁcations and in-band spectral mask requirements. The output power of the presented envelope DAC can be increased in a re-design by scaling device sizes. The envelope DAC is a key component in a software-deﬁned-radio transmitter.