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Correction to “A Channel-Select Filter With Agile Blocker Detection and Adaptive Power Dissipation” Atsushi Yoshizawa and Yannis Tsividis In the above paper [1], a correction should be made to the schematic diagram shown in Fig. 8. One of the three diode-connected cascoded NMOS transistors in that figure should not be diode-connected. The correct schematic is shown below. Fig. 8. Fully differential class-AB output stage op amp with variable bias current. Manuscript received June 29, 2007.
对Yoshizawa和Tsividis的论文中图8的电路图进行了修正。
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电路修正NMOS晶体管全差分运放类AB输出级电路设计
▸修正二极管连接的NMOS晶体管配置
▸提供正确的全差分类AB输出级运放电路图
▸确保电路设计的准确性
Abstract
s Tsividis
In the above paper [1], a correction should be made to the schematic
diagram shown in Fig. 8. One of the three diode-connected cascoded
NMOS transistors in that figure should not be diode-connected. The
correct schematic is shown below.
Fig. 8. Fully differential class-AB output stage op amp with variable bias current.
Manuscript received June 29, 2007.
A. Yoshizawa is with Sony Corporation, Tokyo, Japan (e-mail: Atsushi.
Yoshizawa@jp.sony.com).
Y. Tsividis is with the Department of El