JSSC 2007第11期Clocking & PLLs0.13μm CMOS/0.24μm MRAMSRAMEmerging Memory

A 16-Mb Toggle MRAM With

介绍了一种采用分布式驱动宽摆幅电流镜方案的16Mb Toggle MRAM，支持100MHz突发模式。

16Mb容量, 100MHz突发模式, 0.13μm CMOS, 0.24μm MRAM工艺

磁随机存储器突发模式电流镜流水线噪声隔离

▸分布式驱动宽摆幅电流镜方案：该方法创新通过分布式驱动结构显著提高了操作时钟频率，同时宽摆幅设计确保了写入电流的精确性，解决了传统MRAM在高频操作下的电流精度问题，支持100-MHz突发模式。

▸交错流水线存储阵列组激活方案：系统创新采用交错和流水线技术优化存储阵列的访问时序，有效补偿了切换单元在写入模式下的时序开销，提升了整体吞吐量和能效比。

▸噪声隔离开关方案：电路创新通过专用开关设计隔离噪声干扰，特别是在高频操作下保持信号完整性，确保写入和读取过程的稳定性，增强了MRAM的操作容限。

▸切换式MRAM单元设计：器件创新采用抗写入干扰的切换单元结构，显著降低了写入错误率，结合0.13微米CMOS和0.24微米MRAM工艺，实现了高密度16-Mb存储容量。

Abstract

This paper describes a recently developed 16-Mb toggle magnetic random access memory (MRAM). It has 100-MHz burst modes that are compatible with a pseudo-SRAM even though the toggle cell requires reading and comparing sequences in write modes. To accelerate operating clock frequency, we propose a dis- tributed-driver wide-swing current-mirror scheme, an interleaved and pipelined memory-array group activation scheme, and a noise-insulation switch scheme. These circuit schemes compensate the toggle cell timing overhead in write modes and maintain write-current precision that is essential for the wide operational margin of MRAMs. Because toggle cells are very resistant to write disturbance errors, we designed the 16-Mb MRAM to include a toggle MRAM cell. The MRAM was fabricated with 0.13- m CMOS and 0.24- m MRAM processes with ﬁve metal layers.