JSSC 2007第12期Image Sensors0.18μmCMOS Image Sensor

A 1/2.7-in 2.96 MPixel CMOS Image Sensor With Double CDS Architecture for Full High-Deﬁnition Camcorders Hidekazu Takahashi, Tomoyuki Noda, Takashi Matsuda, Takanori Watanabe, Mahito Shinohara, Toshiaki Endo, Shunsuke Takimoto, Ryuichi Mishima, Shigeru Nishimura, Katsuhito Sakurai

一款采用双CDS架构的127英寸296MP CMOS图像传感器，适用于全高清成像。

0.18μm CMOS, 48MHz, 60帧/s, 220mW

CMOS图像传感器双CDS架构全高清成像低噪声低功耗

▸创新点1：双CDS架构（电路创新）- 采用双重相关双采样技术，有效消除像素复位噪声和固定模式噪声，实现低噪声基底（<51e-），提升图像传感器的信噪比和动态范围。

▸创新点2：高增益列放大器（电路创新）- 集成高增益放大器于每列读出电路中，配合双CDS架构，显著降低读出噪声（实测噪声基底<51e-），同时保持高帧率（60fps@48MHz）。

▸创新点3：优化浅沟槽隔离（工艺创新）- 通过改进STI结构设计，将暗电流抑制至极低水平（<50e-/s@60°C），解决了高温环境下图像质量劣化的关键问题。

▸创新点4：双微透镜低光学堆叠（系统创新）- 采用双层微透镜结构和精简光学层设计，使1/2.7英寸小像素（1.4μm）仍实现高灵敏度（49/52/54%QE），兼顾紧凑尺寸与光学性能。

Abstract

A 1/2.7-in 1944 1484 pixel CMOS image sensor with double CDS architecture fabricated in a 0.18- m single-poly triple-metal (1P3M) CMOS process is described. It operates at 48 MHz in a progressive scanning mode at 60 frames/s for full high-deﬁnition (HD) imaging. Two transistors/pixel archi- tecture and low optical stack with double microlenses achieve /49/52 /54/107/101 /108/120 /115sensitivity and 14 /107/101 saturation. Double CDS architecture with a high-gain column ampliﬁer realized a low noise ﬂoor of /51 /53/101 /114/109/115. Optimized shallow-trench isolation achieved very low dark current of /49/50 /50/101 /115(60 C). This image sensor also realizes low power consumption of 220 mW.