← 返回 JSSC 论文列表JSSC 2007第12期Data Converters0.18μmPipeline ADCOp-Amp
A Zero-Crossing-Based 8-bit 200 MS/s Pipelined ADC
提出基于零交叉的8位200MS/s流水线ADC，采用动态零交叉检测器和电流源替代运算放大器。
8-bit, 200 MS/s, 0.18μm CMOS, 8.5 mW
零交叉流水线ADC动态检测器电流源高速线性
▸创新点1：基于零交叉的电路（ZCBC）作为比较器开关电容电路（CBSC）的推广，提供了一种新型的电路设计方法，显著降低了功耗并提高了速度，实现了8位精度和200 MS/s的采样率。
▸创新点2：动态零交叉检测器替代传统运算放大器，实现了高精度的电荷传输，同时消除了静态电流，使ADC的功耗降至8.5 mW，FOM为0.38 pJ/step（100 MS/s）和0.51 pJ/step（200 MS/s）。
▸创新点3：电流源分割技术通过优化电流分配，显著提高了高速下的线性度，解决了传统设计中高速与线性度难以兼顾的问题。
▸创新点4：采用比特决策触发器替代传统比特决策比较器，进一步提升了转换速度，同时保持了高精度和低功耗特性。
Abstract
Zero-crossing-based circuits (ZCBC) are introduced as a generalization of comparator-based switched-capacitor cir- cuits (CBSC). To demonstrate this concept, an 8-bit, 200 MS/s, pipelined ADC is implemented in a 0.18 m CMOS technology. A dynamic zero-crossing detector and current source replace the functionality of an opamp to realize a precision charge transfer. Furthermore, current source splitting improves linearity at high speeds and bit decision flip-flops replace traditional bit decision comparators for increased speed. The complete ADC draws no static current and consumes 8.5 mW of power. The corresponding FOM is 0.38 pJ/step at 100 MS/s and 0.51 pJ/step at 200 MS/s.