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JSSC 2008第1期RF & Wireless0.13μm

3-D Capacitive Interconnections With Mono- and Bi-Directional Capabilities

基于电容耦合的无线互连方案为3D系统集成提供单向和双向传输能力
1.7 GHz时钟信号传输, 420 ps传播延迟, 22 Mb/s吞吐量, 0.08 pJ/b能耗
3D集成电容耦合无线互连低功耗CMOS
创新点1:电容耦合无线互连技术,通过电极耦合实现芯片间垂直信号传输,支持1.7 GHz时钟信号和22 Mb/s吞吐量,显著提升3D系统集成性能。
创新点2:低功耗RX-TX电路设计,优化电路结构以降低功耗,实现0.08 pJ/b的能效,适用于高密度集成系统。
创新点3:利用CMOS工艺中的不同电压阈值,通过标准晶体管的多阈值设计,增强电路功能性和灵活性,提升系统整体性能。
创新点4:芯片面对面组装技术,采用0.13μm CMOS工艺,实现高密度集成,减少信号传输延迟至420 ps,提高系统响应速度。
Abstract
A wireless interconnection scheme based on capaci- tive coupling provides mono- and bi-directional transmission ca- pabilities for 3-D system integration. Chips are implemented in 0.13 m CMOS technology and assembled face-to-face at die-level. RX-TX circuits are specifically designed for low-power function- ality and the implementation takes advantage of the two different voltage thresholds that are available for the standard transistors in the CMOS process we used. The communication circuits are