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A Clock-Less 10-bit Pipeline-Like A/D Converter for Self-Triggered Sensors
一种用于自触发传感器的无时钟10位类流水线模数转换器
0.35μm CMOS, 400 kS/s, ENOB 8.91
模数转换器自触发传感器无时钟流水线架构低噪声
▸创新点1：无时钟操作（系统创新） - 该ADC采用无时钟设计，通过异步传播机制实现信号转换，消除了传统流水线ADC对时钟信号的依赖，降低了功耗和时序复杂性，适用于自触发传感器应用。
▸创新点2：类流水线架构（架构创新） - 采用类流水线架构，结合组合逻辑实现信号处理，在保持高分辨率（10-bit）的同时，简化了电路结构，提高了转换效率（2.5μs/转换）。
▸创新点3：异步传播部分转换和残差（方法创新） - 通过异步传播部分转换结果和残差信号，实现了无时钟条件下的连续转换，有效降低了噪声干扰（ENOB达8.91），适合低噪声传感器应用。
▸创新点4：低噪声优化（电路创新） - 在标准0.35μm CMOS工艺下实现，通过电路设计和布局优化，在2.24mm²面积内实现了低噪声性能，适用于X射线和γ射线能谱测量等敏感应用。
Abstract
In this paper, a novel 10-bit A/D converter based on a pipeline-like architecture specific for low-noise, self-triggered sensors, (e.g., X-rays and -rays spectrometry) is presented. The main innovative feature of the proposed A/D structure is the concept that, for a sampled input signal, a pipeline ADC may behave as a combinatorial logic and may operate without any timing signal (clock). The conversion is obtained asynchronously propagating the partial conversions and the residues through the various stages. This concept is validated by means of a prototype ADC fabricated in a standard 0.35 m CMOS technology. The active area is 2.24mm/50, and it provides a conversion in 2.5 s (i.e., it can operate with a 400 kS/s data rate) featuring an ENOB equal to 8.91.