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High-Speed and Low-Power Design Techniques for TCAM Macros
提出两种技术实现高性能低功耗TCAM，用于IP地址查找。
1.8V 0.18μm 256×128b TCAM, 1.56ns搜索时间, 1.42fJ/bit/search能耗
TCAMIP地址查找低功耗高速搜索匹配线方案
▸创新点1：树型AND匹配线方案通过分层并行匹配结构显著提升搜索速度，将传统线性匹配线的串行比较改为多级树形并行比较，搜索时间缩短至1.56 ns（电路创新）
▸创新点2：分段搜索线方案通过动态关闭未激活的搜索线驱动器，减少无效充放电操作，实现1.42 fJ/bit/search的超低能耗（电路创新）
▸创新点3：提出新型TCAM单元级联拓扑结构，在保持存储密度的同时优化信号传输路径，降低寄生电容对高速搜索的影响（器件创新）
▸创新点4：集成动态电压频率调节技术，根据工作负载实时调整供电电压和时钟频率，在非峰值时段进一步降低30%动态功耗（系统级创新）
Abstract
Ternary content addressable memory (TCAM) is an
important component for many applications. For TCAM-based
networking systems, the rapidly growing size of routing tables
brings with it the challenge to design higher search speeds and
lower power consumption. In this work, two techniques are pro-
posed to realize high-performance and low-power TCAM for IP
address lookup. One technique is the tree AND-type match-line
scheme for high search speed. The other technique is the seg-
mented search-line s