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JSSC 2008第2期Memory

New Associate Editor I am happy to announce the appointment of Mr Sreedhar Natar

IEEE JSSC期刊宣布新任副主编Sreedhar Natarajan的任命及其在内存技术领域的丰富经验。
IEEE JSSC内存技术半导体SOI副主编
创新点1:作为内存技术专家,Sreedhar Natarajan在SRAM、DRAM、FRAM和内存编译器领域拥有17年的丰富经验,推动了半导体存储器技术的创新与发展,特别是在高性能、低功耗内存设计方面取得了显著成果。
创新点2:作为半导体存储器IP公司Emerging Memory Technologies Inc.的创始人兼CEO,他主导了公司的快速增长和收入提升,成功将先进的内存IP技术商业化,为行业提供了高效、可靠的内存解决方案。
创新点3:作为SOI(绝缘体上硅)和新兴内存路线图的倡导者,他通过学术著作(如《SOI Design: Analog, Memory and Digital Design》)和国际会议演讲,推动了SOI技术和新兴内存技术在半导体行业的应用与发展。
创新点4:作为IEEE杰出讲师和多个国际会议委员会的成员,他通过知识分享和技术领导,促进了内存技术领域的学术与工业界合作,推动了行业标准的制定和技术创新。
Abstract
gs with him a vast amount of expertise in memory technology and design and has served many times as Guest Editor for the Journal. I look forward to working with him. Digital Object Identifier 10.1109/JSSC.2007.916050 Dr. Katsuyuki Sato has retired as Associate Editor. I would like to thank him for his service to the Journal. BRAM NAUTA, Editor-in-Chief University of Twente Enschede, The Netherlands Sreedhar Natarajan (M’95–SM’01) received the Master’s degree in computer engineering from Southwest