← 返回 JSSC 论文列表JSSC 2008第3期RF & Wireless0.13μmLNA
A 1.2-V Highly Linear Balanced Noise-Cancelling LNA in 0.13-/22m CMOS
提出一种高线性、平衡噪声消除的低噪声放大器,适用于低电压操作。
0.13μm CMOS, 1.2V, 10.5mA, 3.0dB NF, +10.5dBm IIP3
低噪声放大器线性度噪声消除低电压CMOS
▸创新点1:电流-电压组合器的电路创新,通过在放大器负载中实现电流到电压的转换,有效平衡和组合并行共栅和共源级的输出电流,显著提升线性度和噪声性能。
▸创新点2:并行共栅和共源级结构的系统创新,结合两种放大器的优势,实现低噪声和高线性度的同时,优化输入阻抗匹配,适用于低电压操作环境。
▸创新点3:高线性度设计的方法创新,仅使用共源级和无源元件来消除共栅级输入阻抗匹配电路引入的噪声和失真,在1.2V低电源电压下仍实现高线性度,IIP3达到+10.5 dBm。
▸创新点4:低电压操作的电路创新,通过优化设计和电流-电压组合器,在1.2V电源电压下实现高性能,噪声系数低至3.0 dB,适用于低功耗应用场景。
Abstract
In this paper, a current-to-voltage combiner is proposed to realize a highly linear, balanced noise-cancelling low-noise amplifier (LNA) capable of low-voltage operation. The current-to-voltage combiner, implemented in the load of the am- plifier, converts the output currents of the parallel common-gate (CG) and common-source (CS) stages of the LNA to voltages, equalizes the amplitudes of the voltages, and combines the voltages to a single output voltage. Since only a CS stage and passive com- ponents are employed to cancel the noise and distortion due to the CG input impedance matching circuit, high linearity is achieved in spite of the low supply voltage of 1.2 V. The LNA achieves a noise figure (NF) of 3.0 dB at 2.1 GHz with an input-referred third-order intercept point (IIP3) of /4310.5 dBm while consuming 10.5 mA from a 1.2-V supply. The amplifier is fabricated in 0.13- m CMOS process.