← 返回 JSSC 论文列表JSSC 2008第3期RF & Wireless0.35μm CMOS
A Noise Reduction and Linearity Improvement Technique for a Differential Cascode
通过电感与电容交叉耦合技术降低差分共源共栅LNA噪声并提升线性度
1.92dB噪声系数, 8.4dB功率增益, >13dB S11, >30dB隔离度, 2.55dBm IIP3, 9mA@1.8V
低噪声放大器共源共栅噪声抑制线性度优化差分结构
▸在共栅晶体管栅极添加电感与电容交叉耦合结合
▸相比传统方法使用更小的噪声抑制电感
▸同时降低噪声、提高线性度和增益
Abstract
A typical common source cascode low-noise amplifier
(CS-LNA) can be treated as a CS-CG two stage amplifier. In the
published literature, an inductor is added at the drain of the main
transistor to reduce the noise contribution of the cascode transis-
tors. In this work, an inductor connected at the gate of the cas-
code transistor and capacitive cross-coupling are strategically com-
bined to reduce the noise and the nonlinearity influences of the cas-
code transistors in a differential cascode CS-L