JSSC 2008第3期RF & Wireless0.13μmLNA

MARCH 2008 VOLUME 43 NUMBER 3 IJSCBC ISSN 0018-9200 New Associate Editor B Nau

该期刊包含多篇关于CMOS电路设计的论文，涵盖低噪声放大器、功率放大器、时钟恢复电路等主题。

0.13μm CMOS, 20GHz, 40Gb/s

低噪声放大器功率放大器时钟恢复CMOS宽带接收器

▸高度线性平衡噪声消除LNA

▸差分级联LNA的噪声降低和线性改善技术

▸功率回退时效率增强的全集成CMOS功率放大器

▸20GHz正交注入锁定LC分频器

▸40Gb/s宽带数据接收器的跨阻AGC放大器和CDR电路

Abstract

ghly Linear Balanced Noise-Cancelling LNA in 0.13- m CMOS ... ....... .......... J . J ussila and P . Sivonen 579 A Noise Reduction and Linearity Improvement Technique for a Differential Cascode LNA................................. .................................................................................... X. F an, H. Zhang, and E. Sánchez-Sinencio 588 Fully Integrated CMOS Power Ampliﬁer With Efﬁciency Enhancement at Power Back-Off ................................ ....................