← 返回 JSSC 论文列表JSSC 2008第4期RF & Wireless0.13μm CMOSPLL
A 5.2-GHz BFSK Transceiver Using Injection-Locking and an On-Chip Antenna
一款适用于短距离无线应用的52GHz BFSK收发器,采用注入锁定和片上天线设计。
52GHz, 1.1mW, 1.8m通信范围
BFSK收发器注入锁定片上天线低功耗短距离通信
▸创新点1:片上集成天线设计(系统创新)。该论文创新性地将天线集成到芯片上,通过利用LC谐振回路的电感作为辐射元件,实现了52GHz频段的无线通信。这种设计避免了传统外接天线的复杂性和体积限制,特别适合短距离无线应用如RFID和医疗传感器。
▸创新点2:PLL在闭环和开环模式下的灵活切换(方法创新)。发射机和接收机均采用PLL结构,初始工作在闭环模式以实现精确的频率锁定,随后切换到开环模式进行调制或解调。这种混合工作模式在保证频率精度的同时实现了高效的FSK调制和解调。
▸创新点3:超低功耗设计支持超电容供电(电路创新)。整个收发系统平均功耗低于1.1mW,使得仅依靠片上超电容供电成为可能。这种设计特别适合无电池应用场景,如植入式医疗设备,其中功耗指标达到行业领先水平。
▸创新点4:直接辐射式VCO调制技术(电路创新)。在发射端,通过直接调制开环VCO产生FSK信号,并利用其LC谐振回路同时作为辐射天线,实现了高效率的无线发射。这种设计简化了传统发射链路的架构,减少了功耗和面积开销。
Abstract
An integrated transceiver design suitable for short range wireless applications, such as RFID or the transmission of data from medical sensors, is presented. Fabricated in a standard 0.13- m CMOS process, the test chips include the transceiver, the integrated antenna, the phase-locked loop (PLL) loop filter and supply decoupling. The transmitter and receiver consist of PLLs operated in both closed– and open-loop modes. Initially closed, the transmit PLL phase locks an RF voltage-controlled oscillator (VCO), the loop is subsequently opened and the VCO is modulated to yield an FM output signal that radiates directly from the tank inductor that doubles as the integrated antenna. The closed-loop receiver phase locks an RF VCO which, in open-loop mode, is injection locked to the incoming FM signal and the PLL components serve to demodulate the signal. Averaged transmit and receive power consumptions are less than 1.1 mW, enabling on-chip ultracapacitors to serve as the power source. When one chip communicates using the on-chip antenna to another chip connected to an off-chip patch antenna the communication range is 1.8 m at 5 kb/s. The communication range can be increased at the expense of the data rate, or by using off-chip antennas with both chips.