← 返回 JSSC 论文列表JSSC 2008第4期Data Converters90nmTDC
A 9 b 125 ps Resolution CoarseFine Time-to-Digital Converter in 90 nm CMOS that
提出一种90nm CMOS工艺下的9位125ps分辨率粗-细时间数字转换器，采用新型时间放大器阵列提升时间分辨率。
90nm CMOS, DNL ±0.8 LSB, INL ±3 LSB, 1.25ps/LSB
粗-细架构开环残差放大子范围归一化时间放大器时间数字转换器
▸新型数字电路放大时间残差，增益更高（16倍）且范围更大（80ps）
▸采用时间放大器阵列和双精细TDC补偿增益变化
▸提出粗-细TDC新架构解决传统ADC架构不适用问题
Abstract
er , IEEE, and Asad A. Abidi , Fellow, IEEE
Abstract—This paper presents the design of a coarse–fine
time-to-digital converter (TDC) that amplifies a time residue to
improve time resolution, similar to a coarse–fine analog-to-digital
converter (ADC). A new digital circuit has been developed to
amplify the time residue with a higher gain (
16) and larger
range (
80 ps) than existing solutions do. However, adapting
the conventional coarse–fine architecture from ADCs is not an
appropriate solution for