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A 40-Gb/s Transimpedance Amplifier in 0.18-/22m CMOS Technology Jun-De Jin and Shawn S. H. Hsu , Member , IEEE
在0.18微米CMOS工艺中实现40Gbs跨阻放大器，采用新型电感峰值技术提升带宽
51dBΩ跨阻增益，30.5GHz带宽，60.1mW功耗，1.17×0.46mm²面积
跨阻放大器带宽增强CMOS工艺电感峰值光通信
▸提出P型电感峰值技术(PIP)
▸实现3.31倍带宽增强比(BWER)
▸输入级PIP拓扑降低高频噪声电流
Abstract
ransimpedance amplifier (TIA) is realized
in 0.18-
m CMOS technology. From the measured S-parameters,
a transimpedance gain of 51 dB /10and a 3-dB bandwidth up to
30.5 GHz were observed. A bandwidth enhancement technique,
-type inductor peaking (PIP), is proposed to achieve a bandwidth
enhancement ratio (BWER) of 3.31. In addition, the PIP topology
used at the input stage decreases the noise current as the opera-
tion frequency increases. Under a 1.8 V supply voltage, the TIA
consumes 60.1 mW wi