Features and Design Constraints for an Optimized SC Front-End Circuit for Capacitive Sensors With a Wide Dynamic Range Ali Heidary and Gerard C. M. Meijer , Senior Member , IEEE

Abstract

This paper presents optimization criteria for an inte- grated switched-capacitor front-end circuit for capacitive sensors with a wide dynamic range. The principle of the interface is based on the use of a relaxation oscillator. A negative-feedback circuit controls the charge-transfer speed to prevent the overload of the input amplifier for large input signals which thus enables a wide dynamic range of capacitor values. Moreover , it has been shown that the use of negative feedback can also result in much better noise performance. However, for the interface to function properly, there is a serious limitation for the value of a specific parasitic ca- pacitance. Therefore, a method which extends the acceptable range of this parasitic capacitance is proposed. A novel method of lin- earity measurement which takes the influence of PCB parasitic ca- pacitances into account, is also presented. The circuit has been de- signed and implemented in 0.7 m standard CMOS technology. The supply voltage is 5 V and the measured value for the supply current is about 1.4 mA. Experimental results show that for the capacitor range of 1 pF to 300 pF, application of negative feedback yields a linearity of about 50 /49/48 /54(14 bits) with a 16-bit resolu- tion for a measurement time of 100 ms. T ests have been performed over the temperature range from 55 Ct o /43125 C.